6b5bc77c9b
Stefan thinks they don't add value. Command used: sed -i -e '/file is part of /d' $(git grep "file is part of " |egrep ":( */\*.*\*/\$|#|;#|-- | *\* )" | cut -d: -f1 |grep -v crossgcc |grep -v gcov | grep -v /elf.h |grep -v nvramtool) The exceptions are for: - crossgcc (patch file) - gcov (imported from gcc) - elf.h (imported from GNU's libc) - nvramtool (more complicated header) The removed lines are: - fmt.Fprintln(f, "/* This file is part of the coreboot project. */") -# This file is part of a set of unofficial pre-commit hooks available -/* This file is part of coreboot */ -# This file is part of msrtool. -/* This file is part of msrtool. */ - * This file is part of ncurses, designed to be appended after curses.h.in -/* This file is part of pgtblgen. */ - * This file is part of the coreboot project. - /* This file is part of the coreboot project. */ -# This file is part of the coreboot project. -# This file is part of the coreboot project. -## This file is part of the coreboot project. --- This file is part of the coreboot project. -/* This file is part of the coreboot project */ -/* This file is part of the coreboot project. */ -;## This file is part of the coreboot project. -# This file is part of the coreboot project. It originated in the - * This file is part of the coreinfo project. -## This file is part of the coreinfo project. - * This file is part of the depthcharge project. -/* This file is part of the depthcharge project. */ -/* This file is part of the ectool project. */ - * This file is part of the GNU C Library. - * This file is part of the libpayload project. -## This file is part of the libpayload project. -/* This file is part of the Linux kernel. */ -## This file is part of the superiotool project. -/* This file is part of the superiotool project */ -/* This file is part of uio_usbdebug */ Change-Id: I82d872b3b337388c93d5f5bf704e9ee9e53ab3a9 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41194 Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
55 lines
931 B
Text
55 lines
931 B
Text
# SPDX-License-Identifier: GPL-2.0-only
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config NORTHBRIDGE_INTEL_IRONLAKE
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bool
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select CPU_INTEL_MODEL_2065X
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select VGA
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select INTEL_EDID
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select INTEL_GMA_ACPI
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select CACHE_MRC_SETTINGS
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select HAVE_DEBUG_RAM_SETUP
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if NORTHBRIDGE_INTEL_IRONLAKE
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config VBOOT
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select VBOOT_MUST_REQUEST_DISPLAY
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select VBOOT_STARTS_IN_BOOTBLOCK
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select VBOOT_SEPARATE_VERSTAGE
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# CPU is reset without platform/TPM during romstage
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select TPM_STARTUP_IGNORE_POSTINIT
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config MMCONF_BUS_NUMBER
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int
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default 256
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config CBFS_SIZE
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hex
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default 0x100000
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config VGA_BIOS_ID
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string
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default "8086,0046"
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config DCACHE_RAM_BASE
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hex
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default 0xfefc0000
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config DCACHE_RAM_SIZE
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hex
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default 0x10000
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config DCACHE_BSP_STACK_SIZE
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hex
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default 0x2000
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help
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The amount of anticipated stack usage in CAR by bootblock and
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other stages.
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config MMCONF_BASE_ADDRESS
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hex
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default 0xe0000000
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config INTEL_GMA_BCLV_OFFSET
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default 0x48254
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endif
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