coreboot-kgpe-d16/src/northbridge/intel/ironlake
Angel Pons 6642b44b29 nb/intel/ironlake: Add more host bridge PCI IDs
The host bridge PCI device ID can be changed by the firmware. There
is no documentation about it, though. There's 'official' IDs, which
appear in spec updates and Windows drivers, and 'mysterious' IDs,
which Intel doesn't want OSes to know about and thus are not listed.

The current coreboot code seems to be able to change the device ID
of the host bridge, but it seems to be missing a warm reset so that
the device ID changes. Account for the 'mysterious' device IDs in
the northbridge driver, so that booting an OS has a chance to work.

For the sake of completeness, add the PCI device IDs for Clarkdale.
Although only Arrandale is known to work, both of them are Ironlake.

It is possible that the Management Engine handles changing the PCI
device ID, which would not happen when using a broken ME firmware.

Change-Id: I93c9c47e2b0bf13d80c986c7d66b6cdf0e192b22
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45562
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-10-24 16:30:42 +00:00
..
acpi nb/intel/ironlake/acpi/hostbridge.asl: Use ASL 2.0 syntax 2020-08-04 21:31:08 +00:00
registers nb/intel/ironlake: Put DMIBAR/EPBAR registers into separate files 2020-10-13 21:10:28 +00:00
acpi.c nb/intel/ironlake/acpi.c: Factor out PCIEXBAR decoding 2020-08-04 21:36:00 +00:00
bootblock.c nb/intel/ironlake: Correct PCIEXBAR definition 2020-08-03 05:30:59 +00:00
chip.h nb/intel/ironlake: Use an enum for gpu_panel_port_select 2020-09-08 05:27:26 +00:00
early_init.c nb/intel/ironlake: Add Generic Non-Core register definitions 2020-08-03 05:32:20 +00:00
finalize.c nb/intel/ironlake: Drop copy-pasted and unused macro 2020-07-01 18:15:58 +00:00
gma.c nb/intel/ironlake: Clean up code style (except raminit) 2020-07-02 19:29:10 +00:00
ironlake.h nb/intel/ironlake: Put DMIBAR/EPBAR registers into separate files 2020-10-13 21:10:28 +00:00
Kconfig treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
Makefile.inc src: Remove leading blank lines from SPDX header 2020-05-18 07:00:27 +00:00
memmap.c nb/intel/ironlake: Drop unnecessary smm_region_start function 2020-10-05 09:19:28 +00:00
northbridge.c nb/intel/ironlake: Add more host bridge PCI IDs 2020-10-24 16:30:42 +00:00
raminit.c nb/intel/ironlake: Clean up DMIBAR/EPBAR registers 2020-10-10 19:30:56 +00:00
raminit.h treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
raminit_tables.c treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
raminit_tables.h treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
romstage.c nb/intel/ironlake: Clean up code style (except raminit) 2020-07-02 19:29:10 +00:00
smi.c nb/intel/ironlake: Add definition for SAD PCI device 2020-08-03 05:30:50 +00:00