Furquan Shaikh 670cd70164 mb/google/octopus/var/bobba: Configure EC_SYNC IRQ as level-triggered ... This change updates the configuration of EC_SYNC IRQ to be level triggered to match the EC behavior. Change-Id: I8e3cb2ae8016ea183d9067697aa5d4b9caa2d07e Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/29576 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>		2018-11-12 20:47:16 +00:00
..
acpi
arch	src: Remove unneeded include "{arch,cpu}/cpu.h"	2018-11-12 09:22:18 +00:00
commonlib	src: Remove unneeded whitespace	2018-10-23 15:52:09 +00:00
console	console: Set default loglevel to 8 (SPEW) for CONFIG_CHROMEOS	2018-10-18 12:50:41 +00:00
cpu	mb/emulation/qemu-i440fx|q35: Switch to C_ENVIRONMENT_BOOTBLOCK	2018-11-12 15:57:34 +00:00
device	src: Remove unneeded whitespace	2018-10-23 15:52:09 +00:00
drivers	src: Remove unneeded include "{arch,cpu}/cpu.h"	2018-11-12 09:22:18 +00:00
ec	ec/google/chromeec: Configure EC_SYNC_IRQ as level triggered	2018-11-12 05:41:57 +00:00
include	src: Remove unneeded include "{arch,cpu}/cpu.h"	2018-11-12 09:22:18 +00:00
lib	src/lib/edid: avoid buffer overflow	2018-11-06 14:07:58 +00:00
mainboard	mb/google/octopus/var/bobba: Configure EC_SYNC IRQ as level-triggered	2018-11-12 20:47:16 +00:00
northbridge	src: Remove unneeded include "{arch,cpu}/cpu.h"	2018-11-12 09:22:18 +00:00
security	security/vboot: Add selection for firmware slots used by VBOOT	2018-11-08 16:19:37 +00:00
soc	src: Remove unneeded include "{arch,cpu}/cpu.h"	2018-11-12 09:22:18 +00:00
southbridge	src: Remove unneeded include "{arch,cpu}/cpu.h"	2018-11-12 09:22:18 +00:00
superio	src: Add missing include <stdint.h>	2018-11-01 11:25:07 +00:00
vendorcode	security/vboot: Add selection for firmware slots used by VBOOT	2018-11-08 16:19:37 +00:00
Kconfig	reset: Finalize move to new API	2018-10-31 15:29:42 +00:00