6837769a90
Due to vendor's requirements LED 2 and LED 3 should be turned off in late boot process. Add appropriate functions to read and write GPIO status. Change-Id: Ia286ef7d02cfcefacf0e8d358847406efe1496fb Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com> Reviewed-on: https://review.coreboot.org/27729 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
69 lines
2.1 KiB
C
69 lines
2.1 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2014 Sage Electronic Engineering, LLC
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <stdint.h>
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#include <arch/io.h>
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#include <southbridge/amd/cimx/cimx_util.h>
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#include "FchPlatform.h"
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#include "gpio_ftns.h"
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void configure_gpio(u32 iomux_gpio, u8 iomux_ftn, u32 gpio, u32 setting)
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{
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u32 bdata;
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bdata = read32((const volatile void *)(ACPI_MMIO_BASE + GPIO_OFFSET
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+ gpio));
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/* out the data value to prevent glitches */
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bdata |= (setting & GPIO_OUTPUT_ENABLE);
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write32((volatile void *)(ACPI_MMIO_BASE + GPIO_OFFSET + gpio), bdata);
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/* set direction and data value */
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bdata |= (setting & (GPIO_OUTPUT_ENABLE | GPIO_OUTPUT_VALUE
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| GPIO_PULL_UP_ENABLE | GPIO_PULL_DOWN_ENABLE));
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write32((volatile void *)(ACPI_MMIO_BASE + GPIO_OFFSET + gpio), bdata);
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write8((volatile void *)(ACPI_MMIO_BASE + IOMUX_OFFSET + iomux_gpio),
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iomux_ftn & 0x3);
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}
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u8 read_gpio(u32 gpio)
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{
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u32 status = read32((const volatile void *)(ACPI_MMIO_BASE + GPIO_OFFSET
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+ gpio));
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return (status & GPIO_PIN_STS) ? 1 : 0;
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}
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void write_gpio(u32 gpio, u8 value)
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{
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u32 status = read32((const volatile void *)(ACPI_MMIO_BASE + GPIO_OFFSET
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+ gpio));
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status &= ~GPIO_OUTPUT_VALUE;
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status |= (value > 0) ? GPIO_OUTPUT_VALUE : 0;
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write32((volatile void *)(ACPI_MMIO_BASE + GPIO_OFFSET + gpio), status);
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}
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int get_spd_offset(void)
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{
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u8 index = 0;
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/* One SPD file contains all 4 options, determine which index to
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* read here, then call into the standard routines.
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*/
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u8 *gpio_bank0_ptr = (u8 *)(ACPI_MMIO_BASE + GPIO_BANK0_BASE);
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if (*(gpio_bank0_ptr + (0x40 << 2) + 2) & BIT0) index |= BIT0;
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if (*(gpio_bank0_ptr + (0x41 << 2) + 2) & BIT0) index |= BIT1;
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return index;
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}
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