66c6413c69
The layout of GNVS has expectation for a fixed size array for chromeos_acpi_t. This allows us to reduce the exposure of <chromeos/gnvs.h>. If chromeos_acpi_t was the last entry in struct global_nvs padding at the end is also removed. If device_nvs_t exists, place a properly sized reserve for chromeos_acpi_t in the middle. Allocation from cbmem is adjusted such that it matches exactly the OperationRegion size defined inside the ASL. Change-Id: If234075e11335ce958ce136dd3fe162f7e5afdf7 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/48788 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
38 lines
920 B
C
38 lines
920 B
C
/* SPDX-License-Identifier: GPL-2.0-only */
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#include <acpi/acpi_gnvs.h>
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#include <ec/google/chromeec/ec.h>
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#include <smbios.h>
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#include <vendorcode/google/chromeos/gnvs.h>
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void gnvs_assign_chromeos(void *gnvs_section)
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{
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chromeos_acpi_t *gnvs_chromeos = gnvs_section;
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chromeos_init_chromeos_acpi(gnvs_chromeos);
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/* EC can override to ECFW_RW. */
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gnvs_chromeos->vbt2 = ACTIVE_ECFW_RO;
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if (CONFIG(EC_GOOGLE_CHROMEEC) && !google_ec_running_ro())
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gnvs_chromeos->vbt2 = ACTIVE_ECFW_RW;
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}
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void gnvs_set_ecfw_rw(void)
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{
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chromeos_acpi_t *gnvs_chromeos = chromeos_get_chromeos_acpi();
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if (!gnvs_chromeos)
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return;
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gnvs_chromeos->vbt2 = ACTIVE_ECFW_RW;
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}
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void smbios_type0_bios_version(uintptr_t address)
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{
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chromeos_acpi_t *gnvs_chromeos = chromeos_get_chromeos_acpi();
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if (!gnvs_chromeos)
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return;
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/* Location of smbios_type0.bios_version() string filled with spaces. */
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gnvs_chromeos->vbt10 = address;
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}
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