coreboot-kgpe-d16/src/cpu/samsung/exynos5250/Kconfig
David Hendricks 4c2245eb67 snow: Stuff to support building image with BL1
This patch does two things which will take effect in follow-up
patches:
1. Add an intermediate Makefile rule for dd'ing BL1 into the
   coreboot.rom pre-image. This is modeled after a similar hack
   for the bd82x6x southbridge.
2. Add a Kconfig variable, BOOTBLOCK_OFFSET, which will be used to
   pass the bootblock offset into cbfstool.

Change-Id: I89da255dc903c387b754b06a11bb3439035ead87
Signed-off-by: David Hendricks <dhendrix@chromium.org>
Reviewed-on: http://review.coreboot.org/2093
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-01-03 06:46:09 +01:00

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config BOOTBLOCK_OFFSET
hex "Bootblock offset"
default 0x3400
help
This is where the Coreboot bootblock resides. For Exynos5250,
this value is pre-determined by the vendor-provided BL1.
config EXYNOS_ACE_SHA
bool
default n
config SATA_AHCI
bool
default n
config SPL_BUILD
bool
default n
config SYS_TEXT_BASE
hex "Executable code section"
default 0x43e00000
config SYS_SDRAM_BASE
hex "SDRAM base address"
default 0x40000000
#FIXME(dhendrix, reinauer): re-visit this RAMBASE/RAMTOP stuff...
config RAMBASE
hex
default SYS_SDRAM_BASE
# according to stefan, this is RAMBASE + 1M.
config RAMTOP
hex
default 0x40100000
config IRAM_BOTTOM
hex
default 0x02020000
config IRAM_TOP
hex
default 0x02077fff
config SYS_INIT_SP_ADDR
hex
default 0x0204F800
config IRAM_STACK
hex
default SYS_INIT_SP_ADDR
config XIP_ROM_SIZE
hex "ROM stage (BL2) size"
default 0x20000