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Patrick Rudolph 6ab7e5e090 nb/intel/sandybridge/raminit: Advertise correct frequency
As of Change-Id: I780d34ded2c1e3737ae1af685c8c2da832842e7c the
reference clock can be 100Mhz.

Decode the register and use the reference clock to calculate
the selected DDR frequency.

Tested on Lenovo T430.

Change-Id: I8481564fe96af29ac31482a7f03bb88f343326f4
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-on: https://review.coreboot.org/19995
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
2017-06-08 11:40:59 +02:00
3rdparty 3rdparty/arm-trusted-firmware: Update to upstream master 2017-05-18 23:55:48 +02:00
Documentation Use more secure HTTPS URLs for coreboot sites 2017-06-07 12:04:50 +02:00
configs Kconfig: Add choice of framebuffer mode 2017-06-04 18:47:19 +02:00
payloads payloads/Kconfig: Add NO_DEFAULT_PAYLOAD 2017-06-07 13:10:48 +02:00
src nb/intel/sandybridge/raminit: Advertise correct frequency 2017-06-08 11:40:59 +02:00
util util/lint: Give better warning for help spacing issue 2017-06-07 23:13:38 +02:00
.checkpatch.conf checkpatch.conf: Update rules 2017-03-09 04:37:28 +01:00
.clang-format
.gitignore .gitignore: ignore blobtool binary 2017-05-14 05:08:55 +02:00
.gitmodules Set up 3rdparty/libgfxinit 2016-10-29 01:35:03 +02:00
.gitreview
COPYING
MAINTAINERS Use www.coreboot.org over coreboot.org 2017-06-07 12:05:44 +02:00
Makefile Makefile: add 'filelist' target 2017-06-07 23:13:05 +02:00
Makefile.inc Use more secure HTTPS URLs for coreboot sites 2017-06-07 12:04:50 +02:00
README Use more secure HTTPS URLs for coreboot sites 2017-06-07 12:04:50 +02:00
gnat.adc gnat.adc: Do not generate assertion code for Refined_Post 2016-10-29 01:33:31 +02:00
toolchain.inc Remove libverstage as separate library and source file class 2017-03-28 22:18:53 +02:00

README

-------------------------------------------------------------------------------
coreboot README
-------------------------------------------------------------------------------

coreboot is a Free Software project aimed at replacing the proprietary BIOS
(firmware) found in most computers.  coreboot performs a little bit of
hardware initialization and then executes additional boot logic, called a
payload.

With the separation of hardware initialization and later boot logic,
coreboot can scale from specialized applications that run directly
firmware, run operating systems in flash, load custom
bootloaders, or implement firmware standards, like PC BIOS services or
UEFI. This allows for systems to only include the features necessary
in the target application, reducing the amount of code and flash space
required.

coreboot was formerly known as LinuxBIOS.


Payloads
--------

After the basic initialization of the hardware has been performed, any
desired "payload" can be started by coreboot.

See https://www.coreboot.org/Payloads for a list of supported payloads.


Supported Hardware
------------------

coreboot supports a wide range of chipsets, devices, and mainboards.

For details please consult:

 * https://www.coreboot.org/Supported_Motherboards
 * https://www.coreboot.org/Supported_Chipsets_and_Devices


Build Requirements
------------------

 * make
 * gcc / g++
   Because Linux distribution compilers tend to use lots of patches. coreboot
   does lots of "unusual" things in its build system, some of which break due
   to those patches, sometimes by gcc aborting, sometimes - and that's worse -
   by generating broken object code.
   Two options: use our toolchain (eg. make crosstools-i386) or enable the
   ANY_TOOLCHAIN Kconfig option if you're feeling lucky (no support in this
   case).
 * iasl (for targets with ACPI support)

Optional:

 * doxygen (for generating/viewing documentation)
 * gdb (for better debugging facilities on some targets)
 * ncurses (for 'make menuconfig' and 'make nconfig')
 * flex and bison (for regenerating parsers)


Building coreboot
-----------------

Please consult https://www.coreboot.org/Build_HOWTO for details.


Testing coreboot Without Modifying Your Hardware
------------------------------------------------

If you want to test coreboot without any risks before you really decide
to use it on your hardware, you can use the QEMU system emulator to run
coreboot virtually in QEMU.

Please see https://www.coreboot.org/QEMU for details.


Website and Mailing List
------------------------

Further details on the project, a FAQ, many HOWTOs, news, development
guidelines and more can be found on the coreboot website:

  https://www.coreboot.org

You can contact us directly on the coreboot mailing list:

  https://www.coreboot.org/Mailinglist


Copyright and License
---------------------

The copyright on coreboot is owned by quite a large number of individual
developers and companies. Please check the individual source files for details.

coreboot is licensed under the terms of the GNU General Public License (GPL).
Some files are licensed under the "GPL (version 2, or any later version)",
and some files are licensed under the "GPL, version 2". For some parts, which
were derived from other projects, other (GPL-compatible) licenses may apply.
Please check the individual source files for details.

This makes the resulting coreboot images licensed under the GPL, version 2.