coreboot-kgpe-d16/src/soc
Jamie Chen 6bb9aaf93f soc/intel/cannonlake: Add Comet Lake H SA 4+2 Device ID
This patch adds CML-H 4+2 SA DID into systemagent.c and report
platform.
According to doc #605546:
    CML-H (4+2) R1: 9B64h

BUG:none
BRANCH:none
TEST:build no error

Change-Id: I5bac6173a84a11abd2ce17f82854fbb14fb8558b
Signed-off-by: Jamie Chen <jamie.chen@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37873
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Reviewed-by: Edward Hill <ecgh@chromium.org>
2020-01-08 05:46:06 +00:00
..
amd soc/amd/common/block/spi: remove code duplication 2020-01-03 23:06:32 +00:00
cavium
intel soc/intel/cannonlake: Add Comet Lake H SA 4+2 Device ID 2020-01-08 05:46:06 +00:00
mediatek soc/mediatek/mt8183: Use DDR clock to compute Tx delay cell 2019-12-20 17:57:03 +00:00
nvidia
qualcomm soc/qualcomm/qcs405: Remove unused QCS405_BLSP_SPI 2020-01-02 14:31:31 +00:00
rockchip src: Replace min/max() with MIN/MAX() 2019-12-20 17:49:29 +00:00
samsung src/soc/samsung: Remove unused <stdlib.h> 2019-12-19 05:39:09 +00:00
sifive src: Replace min/max() with MIN/MAX() 2019-12-20 17:49:29 +00:00
ucb