coreboot-kgpe-d16/src/soc/mediatek/common/dram_init.c
Yu-Ping Wu c074f61d8f soc/mediatek: Include sdram_info in ddr_base_info
Sync dramc_param.h with private repo mtk-dramk (CL:*3751861).

BUG=none
TEST=emerge-asurada coreboot
TEST=Hayato boots with fast calibration
BRANCH=asurada

Change-Id: I79541f66ce68a75147c22b83a456e6268ca1485e
Signed-off-by: Yu-Ping Wu <yupingso@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52257
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
2021-04-14 00:55:57 +00:00

37 lines
913 B
C

/* SPDX-License-Identifier: GPL-2.0-only */
#include <console/console.h>
#include <delay.h>
#include <stdint.h>
#include <soc/dramc_common.h>
#include <soc/dramc_param.h>
#include <soc/emi.h>
struct dramc_param *dramc_params;
bool is_dvfs_enabled(void)
{
dramc_info("dram_init: config_dvfs: %d\n",
dramc_params->dramc_datas.ddr_info.config_dvfs);
return !!(dramc_params->dramc_datas.ddr_info.config_dvfs);
}
u32 get_ddr_geometry(void)
{
dramc_info("dram_init: ddr_geometry: %d\n",
dramc_params->dramc_datas.ddr_info.sdram.ddr_geometry);
return dramc_params->dramc_datas.ddr_info.sdram.ddr_geometry;
}
u32 get_ddr_type(void)
{
dramc_info("dram_init: ddr_type: %d\n",
dramc_params->dramc_datas.ddr_info.sdram.ddr_type);
return dramc_params->dramc_datas.ddr_info.sdram.ddr_type;
}
void init_dram_by_params(struct dramc_param *dparam)
{
dramc_params = dparam;
mt_set_emi(dramc_params);
}