Tim Wawrzynczak 6c6eb652d5 soc/intel/common: Add Intel Power Engine support to discoverable PMC ... In order to get rid of pep.asl, skylake also needs to support runtime generation of the Intel Power Engine, therefore add this support to devices that have a discoverable PMC as well. Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Change-Id: I4bf0c4a338301b335fa78617e0f2ed5a9f4360ed Reviewed-on: https://review.coreboot.org/c/coreboot/+/56013 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>		2021-09-10 21:58:08 +00:00
..
amd	Revert "soc/amd/common: Skip psp_verstage on S0i3 resume"	2021-09-09 20:41:31 +00:00
cavium
example	src: Introduce ARCH_ALL_STAGES_X86	2021-07-02 08:19:10 +00:00
intel	soc/intel/common: Add Intel Power Engine support to discoverable PMC	2021-09-10 21:58:08 +00:00
mediatek	mb/google/cherry: Fix incorrect timestamps in eventlog	2021-09-08 10:16:53 +00:00
nvidia	soc/nvidia/tegra124: Increase bootblock size	2021-07-26 05:05:41 +00:00
qualcomm	sc7280: Refactor QSPI driver	2021-09-03 18:01:57 +00:00
rockchip	include/bcd: move bcd code to commonlib/bsd/include	2021-08-23 14:08:47 +00:00
samsung
sifive
ti
ucb