Sumeet Pawnikar 88766be488 mainboard/google/chell: Set TCC activation offset to 10 degree C ... With the default TCC activation offset value as 0 and Tjmax temperature value as 100 degree C, Pcode firmware starts taking prochot action at 100 degree C [Tjmax-Offset]. But before Pcode firmware starts prochot action at 100 degree C, device is getting shutdown at 99 degree C due to DPTF critical CPU temperature. This patch sets TCC activation offset value to 10 degree C for thermal throttle action to prevent this kind of shutdown. BUG=chrome-os-partner:59397 BRANCH=None. TEST=Built, booted on skylake and verified target offset value. Change-Id: I0811ef481a4b3ce4bd6ef24f2aa8160f44f9c990 Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar@intel.com> Reviewed-on: https://review.coreboot.org/17921 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>		2016-12-26 17:36:55 +01:00
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acpi	google/chell : update DPTF policy settings	2016-11-14 18:07:50 +01:00
spd	src/mainboard: Capitalize ROM, RAM, CPU and APIC	2016-08-14 19:06:25 +02:00
acpi_tables.c	mainboard & southbridge: Clear files that are just headers	2016-12-05 19:20:49 +01:00
board_info.txt
boardid.c
bootblock_mainboard.c	vboot: consolidate google_chromeec_early_init() calls	2016-08-25 22:50:17 +02:00
chromeos.c	google/chromeec: Add common infrastructure for boot-mode switches	2016-11-18 04:01:59 +01:00
chromeos.fmd
cmos.layout	mainboard: Clean up boot_option/reboot_bits in cmos.layout	2016-08-17 00:27:42 +02:00
devicetree.cb	mainboard/google/chell: Set TCC activation offset to 10 degree C	2016-12-26 17:36:55 +01:00
dsdt.asl	chromeos mainboards: remove chromeos.asl	2016-07-30 01:36:32 +02:00
ec.c
ec.h	mainboards,ec: provide common declaration for mainboard_ec_init()	2016-09-26 23:53:12 +02:00
gpio.h
Kconfig	Remove explicit select MMCONF_SUPPORT	2016-11-22 04:15:11 +01:00
Kconfig.name
mainboard.c	chromeos mainboards: remove chromeos.asl	2016-07-30 01:36:32 +02:00
Makefile.inc	skylake/mainboard: Define mainboard hook in bootblock	2016-07-28 05:17:03 +02:00
pei_data.c
ramstage.c
romstage.c	mainboards: align on using ACPI_Sx definitions	2016-07-15 08:30:31 +02:00
smihandler.c	mainboards/skylake: use common Chrome EC SMI helpers	2016-07-15 08:36:24 +02:00