coreboot-kgpe-d16/src/cpu/x86/lapic
arch import user (historical) 6ca7636c8f Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-51
Creator:  Yinghai Lu <yhlu@tyan.com>

cache_as_ram for AMD and some intel


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1967 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-07-06 17:17:25 +00:00
..
boot_cpu.c Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-51 2005-07-06 17:17:25 +00:00
Config.lb - Add new cvs code to cvs 2004-10-14 19:29:29 +00:00
lapic.c - Add new cvs code to cvs 2004-10-14 19:29:29 +00:00
lapic_cpu_init.c Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-34 2005-07-06 17:15:30 +00:00
secondary.S tell people that the segment descriptors are different for ROMCC and 2004-11-04 18:36:06 +00:00