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Aaron Durbin 6ecdb68562 baytrail: add reset support
Bay Trail has the following types of resets it supports:
 - Soft reset (INIT# to cpu) - write 0x1 to I/O 0x92
 - Soft reset (INIT# to cpu)- write 0x4 to I/0 0xcf9
 - Cold reset (S0->S5->S0) - write 0xe to I/0 0xcf9
 - Warm reset (PMC_PLTRST# assertion) - write 0x6 to I/O 0xcf9
 - Global reset (S0->S5->S0 with TXE reset) - write 0x6 or 0xe to
   0xcf9 but with ETR[20] set.

While these are documented this support currently provides support
for 2nd soft reset as well as cold and warm reset.

BUG=chrome-os-partner:23249
BRANCH=None
TEST=Built and booted.

Change-Id: I9746e7c8aed0ffc29e7afa137798e38c5da9c888
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/172710
Reviewed-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: http://review.coreboot.org/4878
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-02-11 22:22:25 +01:00
3rdparty@324ec3cb64 3rdparty: update to current HEAD 2014-01-11 10:57:34 +01:00
documentation documentation: Change the file name of document for building Coreboot 2013-12-09 11:13:35 +01:00
payloads libpayload: Parse CBMEM ACPI GNVS pointer 2014-01-30 05:49:13 +01:00
src baytrail: add reset support 2014-02-11 22:22:25 +01:00
util cbfstool/lzma: Remove code which depends on commented out defines 2014-02-11 20:15:48 +01:00
.gitignore gitignore: ignore the crossgcc/build-{arch}-{archive} 2013-12-09 11:13:53 +01:00
.gitmodules gitmodules: Fix 3rdparty updates 2013-06-28 00:56:43 +02:00
.gitreview add .gitreview 2012-11-01 23:13:39 +01:00
COPYING
Makefile Revert "Makefile: Check $CC variable returned from xcompile is not empty." 2014-01-26 15:46:44 +01:00
Makefile.inc baytrail: add initial support 2014-01-31 16:36:59 +01:00
README

README

-------------------------------------------------------------------------------
coreboot README
-------------------------------------------------------------------------------

coreboot is a Free Software project aimed at replacing the proprietary BIOS
(firmware) found in most computers.  coreboot performs a little bit of
hardware initialization and then executes additional boot logic, called a
payload.

With the separation of hardware initialization and later boot logic,
coreboot can scale from specialized applications that run directly
firmware, run operating systems in flash, load custom
bootloaders, or implement firmware standards, like PC BIOS services or
UEFI. This allows for systems to only include the features necessary
in the target application, reducing the amount of code and flash space
required.

coreboot was formerly known as LinuxBIOS.


Payloads
--------

After the basic initialization of the hardware has been performed, any
desired "payload" can be started by coreboot.

See http://www.coreboot.org/Payloads for a list of supported payloads.


Supported Hardware
------------------

coreboot supports a wide range of chipsets, devices, and mainboards.

For details please consult:

 * http://www.coreboot.org/Supported_Motherboards
 * http://www.coreboot.org/Supported_Chipsets_and_Devices


Build Requirements
------------------

 * gcc / g++
 * make

Optional:

 * doxygen (for generating/viewing documentation)
 * iasl (for targets with ACPI support)
 * gdb (for better debugging facilities on some targets)
 * ncurses (for 'make menuconfig')
 * flex and bison (for regenerating parsers)


Building coreboot
-----------------

Please consult http://www.coreboot.org/Build_HOWTO for details.


Testing coreboot Without Modifying Your Hardware
------------------------------------------------

If you want to test coreboot without any risks before you really decide
to use it on your hardware, you can use the QEMU system emulator to run
coreboot virtually in QEMU.

Please see http://www.coreboot.org/QEMU for details.


Website and Mailing List
------------------------

Further details on the project, a FAQ, many HOWTOs, news, development
guidelines and more can be found on the coreboot website:

  http://www.coreboot.org

You can contact us directly on the coreboot mailing list:

  http://www.coreboot.org/Mailinglist


Copyright and License
---------------------

The copyright on coreboot is owned by quite a large number of individual
developers and companies. Please check the individual source files for details.

coreboot is licensed under the terms of the GNU General Public License (GPL).
Some files are licensed under the "GPL (version 2, or any later version)",
and some files are licensed under the "GPL, version 2". For some parts, which
were derived from other projects, other (GPL-compatible) licenses may apply.
Please check the individual source files for details.

This makes the resulting coreboot images licensed under the GPL, version 2.