Felix Held 6f8f9c969b soc/amd/picasso: move UART Kconfig options to common folder ... The actual UART initialization code will be factored out in follow-up commits. Change-Id: Ie4ddf1951b230323c5480c4389376c62dd74b0e1 Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/48514 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>		2020-12-11 00:43:16 +00:00
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amd	soc/amd/picasso: move UART Kconfig options to common folder	2020-12-11 00:43:16 +00:00
cavium	cbfs: Simplify load/map API names, remove type arguments	2020-12-02 22:13:17 +00:00
example	x86: Add a minimal example SoC along with a board	2020-10-30 21:34:18 +00:00
intel	soc/intel/tigerlake: Check TBT & TCSS ports for wake events	2020-12-10 17:47:03 +00:00
mediatek	soc/mediatek/mt8192: Init SSPM	2020-12-10 14:05:27 +00:00
nvidia	cbfs: Enable CBFS mcache on most chipsets	2020-12-02 22:12:10 +00:00
qualcomm	cbfs: Simplify load/map API names, remove type arguments	2020-12-02 22:13:17 +00:00
rockchip	cbfs: Enable CBFS mcache on most chipsets	2020-12-02 22:12:10 +00:00
samsung	cbfs: Enable CBFS mcache on most chipsets	2020-12-02 22:12:10 +00:00
sifive	cbfs: Enable CBFS mcache on most chipsets	2020-12-02 22:12:10 +00:00
ti	cbfs: Enable CBFS mcache on most chipsets	2020-12-02 22:12:10 +00:00
ucb	soc/ucb/riscv: Add chip_operations stub	2020-05-28 09:30:35 +00:00