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coreboot-kgpe-d16/src/mainboard/google/reef
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Kevin Chiu 6fca307ced google/pyro: Update DPTF settings 
1. Update DPTF CPU/TSR1/TSR2 passive/critial trigger points.
   CPU  passive point:57, critical point:90
   TSR1 passive point:55, critial  point:70
   TSR2 passive point:65, critial  point:80

2. Update DPTF TRT Sample Period.
   CPU: 5s
   TSR0: 50s
   TSR1: 55s
   TSR2: 120s

BUG=none
BRANCH=master
TEST=emerge-pyro coreboot
Change-Id: Ib1b4b31a49d9396b1c5c9dd8d0b9b9998d01744f
Signed-off-by: Kevin Chiu <Kevin.Chiu@quantatw.com>
Reviewed-on: https://review.coreboot.org/17552
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-11-23 22:49:51 +01:00
..
variants google/pyro: Update DPTF settings 2016-11-23 22:49:51 +01:00
acpi_tables.c mainboard/google: add reef reference board 2016-05-13 22:38:53 +02:00
board_info.txt mainboard/google: add reef reference board 2016-05-13 22:38:53 +02:00
boardid.c mainboard/google/reef: add variant API for board_id and gpio 2016-09-06 20:04:18 +02:00
bootblock.c mainboards,ec: provide common declaration for mainboard_ec_init() 2016-09-26 23:53:12 +02:00
chromeos.c google/chromeec: Add common infrastructure for boot-mode switches 2016-11-18 04:01:59 +01:00
chromeos.fmd mainboard/google/reef: Add support for RECOVERY_MRC_CACHE 2016-11-10 00:55:52 +01:00
dsdt.asl mainboards/google/reef: use chromeec's ASL lid switch implementation 2016-09-26 23:52:53 +02:00
ec.c mainboards,ec: provide common declaration for mainboard_ec_init() 2016-09-26 23:53:12 +02:00
Kconfig google/chromeec: Add common infrastructure for boot-mode switches 2016-11-18 04:01:59 +01:00
Kconfig.name mainboard/google/reef: add snappy variant 2016-10-20 20:18:52 +02:00
mainboard.c mainboard/google/reef: allow variants to override NHLT OEM strings 2016-10-28 19:02:35 +02:00
Makefile.inc mainboard/google/reef: provide baseboard and variant concepts 2016-09-04 05:36:43 +02:00
romstage.c mainboard/google/reef: add baseboard memory configuration 2016-09-06 20:16:32 +02:00
smihandler.c google/reef: Remove setting of GPIO_TIER1_SCI enable bit 2016-09-15 01:20:06 +02:00