Edward O'Callaghan 708be1a453 mainboard/jetway/nf81-t56n-lf: Improve diags in romstage ... romstage reports a completely unintelligible printf of "error level:", fix this and document meaning of the return values in source. Change-Id: Ia2fb9a6206e08822f6c2f62b69bf22cdae2ba819 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/5465 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>		2014-05-08 12:10:29 +02:00
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arch	Introduce stage-specific architecture for coreboot	2014-05-06 20:23:31 +02:00
console	console: Fix UART selection prompt	2014-04-30 23:47:28 +02:00
cpu	Introduce stage-specific architecture for coreboot	2014-05-06 20:23:31 +02:00
device	Introduce stage-specific architecture for coreboot	2014-05-06 20:23:31 +02:00
drivers	drivers/pc80/Kconfig: Do not init PS/2 keyboard if GRUB 2 is chosen as payload	2014-05-02 15:05:07 +02:00
ec	Declare recovery and developer modes outside ChromeOS	2014-05-01 15:38:41 +02:00
include	superio/common/conf_mode: Provide another common pnp entry/exit	2014-05-07 21:36:48 +02:00
lib	reg_script: add iosf lpss port access	2014-05-07 12:05:01 +02:00
mainboard	mainboard/jetway/nf81-t56n-lf: Improve diags in romstage	2014-05-08 12:10:29 +02:00
northbridge	northbridge/intel/sandybridge/pei_data.h: Fix typo in hig*h*est in comment	2014-05-06 13:55:39 +02:00
soc	baytrail: gpio: Make GPIO inputs MMIO by default	2014-05-08 07:07:17 +02:00
southbridge	AGESA SPI: Fix Kconfig options	2014-04-29 17:31:40 +02:00
superio	superio/common/conf_mode: Provide another common pnp entry/exit	2014-05-07 21:36:48 +02:00
vendorcode	Introduce stage-specific architecture for coreboot	2014-05-06 20:23:31 +02:00
Kconfig	Introduce stage-specific architecture for coreboot	2014-05-06 20:23:31 +02:00