710566093a
This is where the RAM is (now), on RISC-V. We need to put coreboot.rom in RAM because Spike (at the moment) only supports loading code into the RAM, not into the boot ROM. Change-Id: I6c9b7cffe5fa414825491ee4ac0d2dad59a2d75c Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-on: https://review.coreboot.org/15149 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org> |
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| .. | ||
| qemu-armv7 | ||
| qemu-i440fx | ||
| qemu-power8 | ||
| qemu-q35 | ||
| qemu-riscv | ||
| spike-riscv | ||
| Kconfig | ||
| Kconfig.name | ||