Hannah Williams 7124882aeb board/intel/amenia: Enable LPSS S0ix ... This setting will enable S0ix for LPSS Change-Id: Ie07cb8437d0cee61a03638aa980fd3322fef0c4e Signed-off-by: Hannah Williams <hannah.williams@intel.com> Reviewed-on: https://review.coreboot.org/15056 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins)		2016-07-07 17:02:57 +02:00
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acpi	acpi/: add missing license header	2016-01-14 22:52:11 +01:00
arch	acpi_device: Have acpi_device_scope() use a separate buffer	2016-07-02 01:20:18 +02:00
commonlib	region: Add writeat and eraseat support	2016-06-24 20:48:12 +02:00
console	console/post: be explicit about conditional cmos_post_log() compiling	2016-05-25 18:04:11 +02:00
cpu	AMD k8 fam10: Refactor S3 recovery	2016-06-29 07:33:58 +02:00
device	device: i2c: Add support for I2C bus operations	2016-06-09 17:05:40 +02:00
drivers	siemens/nc_fpga: Add driver for Siemens NC FPGA	2016-07-06 22:38:58 +02:00
ec	ec/google: Add support for the EC 'get time' function	2016-06-24 20:22:52 +02:00
include	gpio: Add support for translating gpio_t into ACPI pin	2016-07-02 01:18:53 +02:00
lib	gpio: Add support for translating gpio_t into ACPI pin	2016-07-02 01:18:53 +02:00
mainboard	board/intel/amenia: Enable LPSS S0ix	2016-07-07 17:02:57 +02:00
northbridge	intel/i945: Use common ACPI S3 recovery	2016-06-26 14:03:02 +02:00
soc	intel/fsp_broadwell_de: Do not use hard coded SCI IRQ for ACPI	2016-07-07 06:19:33 +02:00
southbridge	PCI: Use PCI_DEVFN macro instead of DEV_FUNC	2016-07-06 21:58:09 +02:00
superio	sio/winbond/w83667hg-a: Add pinmux defines for UART B	2016-05-29 19:34:54 +02:00
vendorcode	intel/i210: Change API for function mainboard_get_mac_address()	2016-07-05 06:27:44 +02:00
Kconfig	Kconfig: Show DEBUG_BOOT_STATE in the Debug menu	2016-07-01 21:33:36 +02:00