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Paul Menzel aeda4b8c0a src/mainboard: Drop redundant CHIP_NAME again for new ports 
Since commit »Drop redundant CHIP_NAME in mainboard.c« (a93c3fe7) [1]
`CHIP_NAME` is unneeded for mainboards as the name is composed
automatically in `src/devices/root_device.c` from the strings in
Kconfig.

Unfortunately the ports for Google Butterfly, Link and Parrot as
as well as IEI PM-LX2-800-R10 introduced CHIP_NAME again. So drop
it again too.

[1] http://review.coreboot.org/1635

Change-Id: Ice7577a2a5c6070e196f2647c440b7a8e140e27e
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: http://review.coreboot.org/2708
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-03-13 17:39:58 +01:00
..
arch Eliminate do_div(). 2013-03-08 23:14:26 +01:00
console Eliminate do_div(). 2013-03-08 23:14:26 +01:00
cpu exynos5250: Don't set PS_HOLD in bootblock_cpu_init 2013-03-13 16:55:54 +01:00
device GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« 2013-03-01 10:16:08 +01:00
drivers GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« 2013-03-01 10:16:08 +01:00
ec GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« 2013-03-01 10:16:08 +01:00
include watchdog.h: Fix compile time error on disabling watchdog handling 2013-03-12 12:06:43 +01:00
lib Eliminate do_div(). 2013-03-08 23:14:26 +01:00
mainboard src/mainboard: Drop redundant CHIP_NAME again for new ports 2013-03-13 17:39:58 +01:00
northbridge Add Intel Panther Point USB3 initialization 2013-03-09 00:09:37 +01:00
southbridge AMD CIMx SB800: Enable AHCI mode for SATA controller by default 2013-03-12 22:52:44 +01:00
superio AMD SB800: don't switch clock from 14 to 48 MHz for smscsuperio 2013-03-06 19:07:28 +01:00
vendorcode AGESA: Fix CR0_PE bit define 2013-03-08 07:30:06 +01:00
Kconfig bump SeaBIOS to 1.7.2.1 2013-03-04 11:00:17 +01:00