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David Hendricks 72a4288650 exynos5420: ddr3: Switch from 4G setup to 2G setup on exynos5420
This changes the number of chip selects that we configure from 2 to 1.
On current setups with (x16 memory 4Gbit chips) that means that we're
at 2GByte.

Technically we should add a second setting in the ares_ddr3_timings
and select between the two of the based on board strappings.  That
would make the CONFIG_RUN_TIME_BANK_NUMBER work properly.  I've
changed the ddr3_mem_ctrl_init() so it should handle that, but I'm not
actually doing the board strapping read right now.

This change means that accesses to 0xA0000000 - 0xFFFFFFFF on 2G
systems will no longer put the system in a messed up state (leading to
a hang).  It also prevents some of the weird boot behavior that we've
seen that comes and goes depending on U-Boot alignment.  See
<http://crosbug.com/p/20577>.

This patch was ported from: https://gerrit.chromium.org/gerrit/66117
Signed-off-by: David Hendricks <dhendrix@chromium.org>

Change-Id: Ib4cfe420aac30bd817438f06d01e8671afc4a27d
Reviewed-on: https://chromium-review.googlesource.com/167210
Commit-Queue: David Hendricks <dhendrix@chromium.org>
Tested-by: David Hendricks <dhendrix@chromium.org>
Reviewed-by: ron minnich <rminnich@chromium.org>
(cherry picked from commit 0ea574243058068702e3f6bc7355098745d16880)
Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com>
Reviewed-on: http://review.coreboot.org/6612
Tested-by: build bot (Jenkins)
2014-08-12 22:18:53 +02:00
3rdparty@45f0c04fd7 acpigen: Add acpigen_emit_eisaid. 2014-06-01 01:24:53 +02:00
documentation Documentation: Use correct file name for the build guide in the Makefile 2014-07-04 19:03:10 +02:00
payloads libpayload: ehci: Set explicit terminate bits in dummy_qh next pointers. 2014-08-12 22:06:55 +02:00
src exynos5420: ddr3: Switch from 4G setup to 2G setup on exynos5420 2014-08-12 22:18:53 +02:00
util nvramtool: plug some memory leaks 2014-08-12 22:15:20 +02:00
.gitignore .gitignore: add 3 executables that can be built in util/ 2014-08-11 06:26:01 +02:00
.gitmodules gitmodules: Fix 3rdparty updates 2013-06-28 00:56:43 +02:00
.gitreview add .gitreview 2012-11-01 23:13:39 +01:00
COPYING update license template. 2006-08-12 22:03:36 +00:00
Makefile build system: avoid warning about missing .xcompile 2014-07-20 19:51:10 +02:00
Makefile.inc coreboot classes: Add dynamic classes to coreboot 2014-08-11 15:42:20 +02:00
README Update README with newer version of the text from the web page 2011-06-15 10:16:33 +02:00
toolchain.inc coreboot classes: Add dynamic classes to coreboot 2014-08-11 15:42:20 +02:00

README

-------------------------------------------------------------------------------
coreboot README
-------------------------------------------------------------------------------

coreboot is a Free Software project aimed at replacing the proprietary BIOS
(firmware) found in most computers.  coreboot performs a little bit of
hardware initialization and then executes additional boot logic, called a
payload.

With the separation of hardware initialization and later boot logic,
coreboot can scale from specialized applications that run directly
firmware, run operating systems in flash, load custom
bootloaders, or implement firmware standards, like PC BIOS services or
UEFI. This allows for systems to only include the features necessary
in the target application, reducing the amount of code and flash space
required.

coreboot was formerly known as LinuxBIOS.


Payloads
--------

After the basic initialization of the hardware has been performed, any
desired "payload" can be started by coreboot.

See http://www.coreboot.org/Payloads for a list of supported payloads.


Supported Hardware
------------------

coreboot supports a wide range of chipsets, devices, and mainboards.

For details please consult:

 * http://www.coreboot.org/Supported_Motherboards
 * http://www.coreboot.org/Supported_Chipsets_and_Devices


Build Requirements
------------------

 * gcc / g++
 * make

Optional:

 * doxygen (for generating/viewing documentation)
 * iasl (for targets with ACPI support)
 * gdb (for better debugging facilities on some targets)
 * ncurses (for 'make menuconfig')
 * flex and bison (for regenerating parsers)


Building coreboot
-----------------

Please consult http://www.coreboot.org/Build_HOWTO for details.


Testing coreboot Without Modifying Your Hardware
------------------------------------------------

If you want to test coreboot without any risks before you really decide
to use it on your hardware, you can use the QEMU system emulator to run
coreboot virtually in QEMU.

Please see http://www.coreboot.org/QEMU for details.


Website and Mailing List
------------------------

Further details on the project, a FAQ, many HOWTOs, news, development
guidelines and more can be found on the coreboot website:

  http://www.coreboot.org

You can contact us directly on the coreboot mailing list:

  http://www.coreboot.org/Mailinglist


Copyright and License
---------------------

The copyright on coreboot is owned by quite a large number of individual
developers and companies. Please check the individual source files for details.

coreboot is licensed under the terms of the GNU General Public License (GPL).
Some files are licensed under the "GPL (version 2, or any later version)",
and some files are licensed under the "GPL, version 2". For some parts, which
were derived from other projects, other (GPL-compatible) licenses may apply.
Please check the individual source files for details.

This makes the resulting coreboot images licensed under the GPL, version 2.