coreboot-kgpe-d16/src/mainboard/intel/adlrvp
Cliff Huang 73ed5991bc mb/intel/adlrvp_m: Fix to Enable PCIe x1 Slot
This fix will enable PCIe x1 slot for ADL-M LP4 and LP5 RVPs.
The BDF for this PCIe slot is pci is: 0000:00:1d.0

TEST = show device command:
    $ lspci -s 00:19.0
    expect this:
    00:19.0 Serial bus controller [0c80]: Intel Corporation Device 51c5

Signed-off-by: Cliff Huang <cliff.huang@intel.com>
Change-Id: Ia988fa0b5d8fefe68503b39843aab06c4229b36f
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57053
Reviewed-by: Bora Guvendik <bora.guvendik@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-08-30 12:20:28 +00:00
..
include/baseboard mb/intel/adlrvp: create dynamic power limits mechanism for thermal 2021-08-10 21:22:22 +00:00
spd mb/intel/adlrvp: Update DIMM type as memory down for DDR5 MR SKU 2021-08-13 18:04:02 +00:00
variants mb/intel/adlrvp: Use device aliases 2021-06-05 19:54:43 +00:00
board_id.c
board_id.h
board_info.txt
bootblock.c mb/{google, intel}: Make use of `cpu/intel/cpu_ids.h' 2021-07-19 18:25:42 +00:00
chromeos.c
chromeos.fmd mb/intel/adlrvp: Increase RO/RW region size in chromeos.fmd 2021-05-03 07:42:51 +00:00
devicetree.cb soc/intel/common: Use CHIPSET_LOCKDOWN_COREBOOT by default 2021-08-28 18:21:26 +00:00
devicetree_m.cb soc/intel/common: Use CHIPSET_LOCKDOWN_COREBOOT by default 2021-08-28 18:21:26 +00:00
dsdt.asl mb/intel/adlrvp: Remove ASL code and enable dynamic SSDT creation for camera ACPI 2021-07-05 10:51:32 +00:00
early_gpio.c mb/intel/adlrvp: Program CPU PCIE RP GPIOs in early GPIO 2021-05-07 09:32:26 +00:00
early_gpio_m.c mb/intel/adlrvp_m: Enable CR50 TPM support over SPI 2021-08-16 14:59:55 +00:00
ec.c
fw_config.c mb/intel/adlrvp: Enable I2S audio codecs on ADL-M RVP 2021-07-21 15:43:16 +00:00
gpio.c mb/intel/adlrvp: Configure SATA DEVSLP as per latest schematics 2021-01-28 09:26:48 +00:00
gpio_m.c mb/intel/adlrvp_m: Fix to Enable PCIe x1 Slot 2021-08-30 12:20:28 +00:00
Kconfig mb/intel/adlrvp: Drop INTEL_CAR_NEM Kconfig select on ADL-P RVP 2021-08-19 17:31:00 +00:00
Kconfig.name mb/intel/adlrvp: Drop INTEL_CAR_NEM Kconfig select on ADL-P RVP 2021-08-19 17:31:00 +00:00
mainboard.c mb/intel/adlrvp: create dynamic power limits mechanism for thermal 2021-08-10 21:22:22 +00:00
Makefile.inc mb/intel/adlrvp: create dynamic power limits mechanism for thermal 2021-08-10 21:22:22 +00:00
memory.c mb/intel/adlrvp: Add board id for MR DDR5 SKU 2021-06-14 05:55:30 +00:00
ramstage.c mb/intel/adlrvp: create dynamic power limits mechanism for thermal 2021-08-10 21:22:22 +00:00
romstage_fsp_params.c mb/intel/adlrvp: Update DIMM type as memory down for DDR5 MR SKU 2021-08-13 18:04:02 +00:00
smihandler.c