09bb428afa
This patch modified the puff fmd files to support CSE Lite SKU. * Reduce the SI_ALL size to 3MiB since ME binary size is less than 2.5MiB. * Increase the FW_MAIN_A/B size to accommodate the ME_RW update binary with CSE Lite SKU. BUG=b:154561163 TEST=Build and boot puff with CSE Lite SKU. Cq-Depend: chrome-internal:3046770 Change-Id: I4d39a1bdeabf48fc740da67539f48a9ff72c442c Signed-off-by: V Sowmya <v.sowmya@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41198 Reviewed-by: Sridhar Siricilla <sridhar.siricilla@intel.com> Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
48 lines
1.3 KiB
Text
48 lines
1.3 KiB
Text
FLASH@0xfe000000 0x2000000 {
|
|
SI_ALL@0x0 0x300000 {
|
|
SI_DESC@0x0 0x1000
|
|
SI_ME@0x1000 0x2ff000
|
|
}
|
|
SI_BIOS@0x300000 0x1d00000 {
|
|
# Place RW_LEGACY at the start of BIOS region such that the rest
|
|
# of BIOS regions start at 16MiB boundary. Since this is a 32MiB
|
|
# SPI flash only the top 16MiB actually gets memory mapped.
|
|
RW_LEGACY(CBFS)@0x0 0x1000000
|
|
RW_SECTION_A@0x1000000 0x460000 {
|
|
VBLOCK_A@0x0 0x10000
|
|
FW_MAIN_A(CBFS)@0x10000 0x44ffc0
|
|
RW_FWID_A@0x45ffc0 0x40
|
|
}
|
|
RW_SECTION_B@0x1460000 0x460000 {
|
|
VBLOCK_B@0x0 0x10000
|
|
FW_MAIN_B(CBFS)@0x10000 0x44ffc0
|
|
RW_FWID_B@0x45ffc0 0x40
|
|
}
|
|
RW_MISC@0x18c0000 0x40000 {
|
|
UNIFIED_MRC_CACHE(PRESERVE)@0x0 0x30000 {
|
|
RECOVERY_MRC_CACHE@0x0 0x10000
|
|
RW_MRC_CACHE@0x10000 0x20000
|
|
}
|
|
RW_ELOG(PRESERVE)@0x30000 0x4000
|
|
RW_SHARED@0x34000 0x4000 {
|
|
SHARED_DATA@0x0 0x2000
|
|
VBLOCK_DEV@0x2000 0x2000
|
|
}
|
|
RW_VPD(PRESERVE)@0x38000 0x2000
|
|
RW_NVRAM(PRESERVE)@0x3a000 0x5000
|
|
RW_SPD_CACHE(PRESERVE)@0x3f000 0x1000
|
|
}
|
|
# Make WP_RO region align with SPI vendor
|
|
# memory protected range specification.
|
|
WP_RO@0x1900000 0x400000 {
|
|
RO_VPD(PRESERVE)@0x0 0x4000
|
|
RO_SECTION@0x4000 0x3fc000 {
|
|
FMAP@0x0 0x800
|
|
RO_FRID@0x800 0x40
|
|
RO_FRID_PAD@0x840 0x7c0
|
|
GBB@0x1000 0x3000
|
|
COREBOOT(CBFS)@0x4000 0x3f8000
|
|
}
|
|
}
|
|
}
|
|
}
|