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coreboot-kgpe-d16/src/arch/armv7
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David Hendricks 7762091fcb armv7: set cache level explicitly for dcache/unified cache case 
This adds a missing CSSELR write in the case of a dcache or unified
cache being invalidated by armv7_invalidate_caches(), ensuring that
all levels of dcache/unified cache are invalidated as expected when
the function is called.

Change-Id: Ie90184bf8a8181afa3afe0786897455b30b7f022
Signed-off-by: David Hendricks <dhendrix@chromium.org>
Reviewed-on: http://review.coreboot.org/2947
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Tested-by: build bot (Jenkins)
2013-03-29 18:20:41 +01:00
..
boot Unify coreboot table generation 2013-03-22 00:17:55 +01:00
include armv7: add functions for reading/writing L2CTLR 2013-03-29 07:48:00 +01:00
lib armv7: set cache level explicitly for dcache/unified cache case 2013-03-29 18:20:41 +01:00
bootblock.inc Whitespace: Replace tab character in license text with two spaces 2013-02-20 23:30:45 +01:00
bootblock.lds GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« 2013-03-01 10:16:08 +01:00
bootblock_simple.c armv7: add new dcache and MMU setup functions 2013-03-26 00:10:31 +01:00
coreboot_ram.ld ARM: Fix the ldscripts so that exit/enter stage work correctly. 2013-03-20 05:56:22 +01:00
exception.c ARMV7 and Google/Snow: Add exception support code to the ramstage 2013-03-08 22:03:37 +01:00
exception_asm.S ARMV7 and Google/Snow: Add exception support code to the ramstage 2013-03-08 22:03:37 +01:00
Kconfig armv7: Clean up: remove deprecated SPL. 2013-02-06 22:09:01 +01:00
Makefile.inc ARMv7: Drop ROMSTAGE_BASE from Makefile.inc 2013-03-26 20:45:57 +01:00
romstage.ld ARM: Fix the ldscripts so that exit/enter stage work correctly. 2013-03-20 05:56:22 +01:00
stages.c armv7/exynos/snow: new cache maintenance API 2013-03-19 22:23:45 +01:00