36a2356fb1
Rewrite the handler to be more compact and extendable. The old functionality is duplicated after the rewrite. All SMI source registers (except for SmiSciStatus) behave identically so these are consolidated. Register 0x80 contains sources 0-31, 0x81 sources 32-63, and so on. Create a table of mini-handlers to be supported in the soc directory. As SMI sources are discovered, attempt to find the corresponding handler and then execute it. Change-Id: Ic7050ecf65c2af036fe297f429a0bbdc709ad4c1 Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-on: https://review.coreboot.org/21746 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Marc Jones <marc@marcjonesconsulting.com>
124 lines
3.1 KiB
C
124 lines
3.1 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2017 Advanced Micro Devices, Inc.
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* Copyright (C) 2014 Alexandru Gagniuc <mr.nuke.me@gmail.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License, or (at your
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* option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <console/console.h>
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#include <cpu/x86/smm.h>
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#include <delay.h>
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#include <soc/smi.h>
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#include <soc/southbridge.h>
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static void sb_apmc_smi_handler(void)
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{
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u32 reg32;
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const uint8_t cmd = inb(pm_acpi_smi_cmd_port());
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switch (cmd) {
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case APM_CNT_ACPI_ENABLE:
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reg32 = inl(ACPI_PM1_CNT_BLK);
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reg32 |= (1 << 0); /* SCI_EN */
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outl(reg32, ACPI_PM1_CNT_BLK);
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break;
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case APM_CNT_ACPI_DISABLE:
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reg32 = inl(ACPI_PM1_CNT_BLK);
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reg32 &= ~(1 << 0); /* clear SCI_EN */
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outl(ACPI_PM1_CNT_BLK, reg32);
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break;
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}
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mainboard_smi_apmc(cmd);
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}
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int southbridge_io_trap_handler(int smif)
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{
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return 0;
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}
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/*
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* Table of functions supported in the SMI handler. Note that SMI source setup
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* in southbridge.c is unrelated to this list.
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*/
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struct smi_sources_t smi_sources[] = {
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{ .type = SMITYPE_SMI_CMD_PORT, .handler = sb_apmc_smi_handler },
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};
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static void process_smi_sci(void)
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{
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const uint32_t status = smi_read32(SMI_SCI_STATUS);
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/* Clear events to prevent re-entering SMI if event isn't handled */
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smi_write32(SMI_SCI_STATUS, status);
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}
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static void *get_source_handler(int source)
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{
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int i;
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for (i = 0 ; i < ARRAY_SIZE(smi_sources) ; i++)
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if (smi_sources[i].type == source)
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return smi_sources[i].handler;
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return NULL;
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}
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static void process_smi_sources(uint32_t reg)
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{
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const uint32_t status = smi_read32(reg);
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int bit_zero = 32 / sizeof(uint32_t) * (reg - SMI_REG_SMISTS0);
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void (*source_handler)(void);
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int i;
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for (i = 0 ; i < 32 ; i++) {
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if (status & (1 << i)) {
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source_handler = get_source_handler(i + bit_zero);
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if (source_handler)
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source_handler();
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}
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}
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if (reg == SMI_REG_SMISTS0)
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if (status & GEVENT_MASK)
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/* Gevent[23:0] are assumed to be mainboard-specific */
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mainboard_smi_gpi(status & GEVENT_MASK);
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/* Clear all events in this register */
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smi_write32(reg, status);
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}
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void southbridge_smi_handler(void)
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{
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const uint16_t smi_src = smi_read16(SMI_REG_POINTER);
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if (smi_src & SMI_STATUS_SRC_SCI)
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process_smi_sci();
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if (smi_src & SMI_STATUS_SRC_0)
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process_smi_sources(SMI_REG_SMISTS0);
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if (smi_src & SMI_STATUS_SRC_1)
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process_smi_sources(SMI_REG_SMISTS1);
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if (smi_src & SMI_STATUS_SRC_2)
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process_smi_sources(SMI_REG_SMISTS2);
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if (smi_src & SMI_STATUS_SRC_3)
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process_smi_sources(SMI_REG_SMISTS3);
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if (smi_src & SMI_STATUS_SRC_4)
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process_smi_sources(SMI_REG_SMISTS4);
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}
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void southbridge_smi_set_eos(void)
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{
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uint32_t reg = smi_read32(SMI_REG_SMITRIG0);
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reg |= SMITRG0_EOS;
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smi_write32(SMI_REG_SMITRIG0, reg);
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}
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