bd79c5eaf1
Change-Id: I8486e70615f4c404a342cb86963b5357a934c41d Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: http://review.coreboot.org/7606 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
49 lines
1.3 KiB
C
49 lines
1.3 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2008-2009 coresystems GmbH
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* Copyright (C) 2014 Google Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <arch/io.h>
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#include <halt.h>
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#include <reset.h>
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#include <broadwell/reset.h>
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/*
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* Soft reset (INIT# to cpu) - write 0x1 to I/O 0x92
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* Soft reset (INIT# to cpu)- write 0x4 to I/0 0xcf9
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* Cold reset (S0->S5->S0) - write 0xe to I/0 0xcf9
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* Warm reset (PLTRST# assertion) - write 0x6 to I/O 0xcf9
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* Global reset (S0->S5->S0 with ME reset) - write 0x6 or 0xe to 0xcf9 but
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* with ETR[20] set.
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*/
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void soft_reset(void)
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{
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outb(0x04, 0xcf9);
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}
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void hard_reset(void)
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{
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outb(0x06, 0xcf9);
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}
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void reset_system(void)
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{
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hard_reset();
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halt();
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}
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