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coreboot-kgpe-d16/src/soc/intel/broadwell
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Duncan Laurie 3ed4d39b57 broadwell: Add config option to disable DSP power gating in D3 
This is useful for debug and testing.

BUG=chrome-os-partner:29649
BRANCH=None
TEST=build and boot on samus

Original-Change-Id: I9050e75fd7c308ebd97d196298c687f8b0f8f97d
Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/210599
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
(cherry picked from commit 2831154af4f33717489cb0b62aef228fb8f7c2e2)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>

Change-Id: Ie622df02d9ab219cefce5f11332e010b47e3ec6e
Reviewed-on: http://review.coreboot.org/8947
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@google.com>
2015-03-27 05:28:09 +01:00
..
acpi acpi: Generate valid ACPI processor objects 2015-02-16 21:02:30 +01:00
bootblock broadwell: Preparations for building 2014-12-31 21:22:24 +01:00
broadwell baytrail broadwell: Use timestamps internal stash 2015-01-14 19:45:36 +01:00
microcode
romstage baytrail broadwell: Use timestamps internal stash 2015-01-14 19:45:36 +01:00
acpi.c intel/broadwell: Spelling fixes 2014-12-08 05:38:54 +01:00
adsp.c broadwell: Add config option to disable DSP power gating in D3 2015-03-27 05:28:09 +01:00
chip.c broadwell: Preparations for building 2014-12-31 21:22:24 +01:00
chip.h broadwell: Add config option to disable DSP power gating in D3 2015-03-27 05:28:09 +01:00
cpu.c broadwell: Preparations for building 2014-12-31 21:22:24 +01:00
ehci.c broadwell: Preparations for building 2014-12-31 21:22:24 +01:00
elog.c bootstate: use structure pointers for scheduling callbacks 2015-03-18 16:41:43 +01:00
finalize.c bootstate: use structure pointers for scheduling callbacks 2015-03-18 16:41:43 +01:00
gpio.c
hda.c x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer 2015-02-15 08:50:22 +01:00
igd.c x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer 2015-02-15 08:50:22 +01:00
iobp.c
Kconfig broadwell: enable PCIe endpoint CLK power management 2015-03-09 03:33:52 +01:00
lpc.c ACPI: Get S3 resume state from romstage_handoff 2015-03-10 23:42:10 +01:00
Makefile.inc soc/intel/broadwell/spi_loading.c: Remove dead code 2015-01-12 18:55:49 +01:00
me.c ACPI: Get S3 resume state from romstage_handoff 2015-03-10 23:42:10 +01:00
me_status.c intel/broadwell: Spelling fixes 2014-12-08 05:38:54 +01:00
memmap.c CBMEM: Do not use get_top_of_ram() with DYNAMIC_CBMEM 2015-01-27 22:48:06 +01:00
minihd.c x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer 2015-02-15 08:50:22 +01:00
monotonic_timer.c
pch.c intel/broadwell: Spelling fixes 2014-12-08 05:38:54 +01:00
pcie.c intel/broadwell: Spelling fixes 2014-12-08 05:38:54 +01:00
pei_data.c broadwell: Use correct include file for console functions 2015-01-06 18:23:29 +01:00
pmutil.c
ramstage.c ACPI: Get S3 resume state from romstage_handoff 2015-03-10 23:42:10 +01:00
refcode.c ACPI: Get S3 resume state from romstage_handoff 2015-03-10 23:42:10 +01:00
reset.c Replace hlt() loops with halt() 2014-11-30 12:20:07 +01:00
sata.c x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer 2015-02-15 08:50:22 +01:00
serialio.c x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer 2015-02-15 08:50:22 +01:00
smbus.c
smbus_common.c
smi.c
smihandler.c intel/broadwell: Spelling fixes 2014-12-08 05:38:54 +01:00
smmrelocate.c
spi.c bootstate: use structure pointers for scheduling callbacks 2015-03-18 16:41:43 +01:00
stage_cache.c
systemagent.c ACPI: Get S3 resume state from romstage_handoff 2015-03-10 23:42:10 +01:00
tsc_freq.c
usbdebug.c
xhci.c x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer 2015-02-15 08:50:22 +01:00