Arthur Heymans 0024678d17 cpu/intel/model_fxx: Select SSE2 ... Starting from Intel Pentium 4, cpus featured SSE2. This will be used in the follow-up patches to determine whether to use mfence as this instruction was introduced with the SSE2 feature set. Change-Id: I8ce37d855cf84a9fb9fe9e18d77b0c19be261407 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/64666 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>		2022-06-02 15:58:34 +00:00
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Kconfig	cpu/intel/model_fxx: Select SSE2	2022-06-02 15:58:34 +00:00
Makefile.inc
model_f3x_init.c	cpu/x86/lapic: Move LAPIC configuration to MP init	2022-02-05 07:59:04 +00:00