7e6946a74c
With the memory controller the separate sockets becomes a useless distinction. They all used the same code anyway. UNTESTED: This also updates autoport. Change-Id: I044d434a5b8fca75db9eb193c7ffc60f3c78212b Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/31031 Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Reviewed-by: Tristan Corrick <tristan@corrick.kiwi> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
122 lines
4 KiB
Text
122 lines
4 KiB
Text
##
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## This file is part of the coreboot project.
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##
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## Copyright (C) 2018 Angel Pons <th3fanbus@gmail.com>
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##
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## This program is free software; you can redistribute it and/or modify
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## it under the terms of the GNU General Public License as published by
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## the Free Software Foundation; version 2 of the License.
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##
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## This program is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU General Public License for more details.
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##
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chip northbridge/intel/sandybridge
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register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410 }"
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register "gfx.ndid" = "3"
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device cpu_cluster 0x0 on
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chip cpu/intel/model_206ax
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register "c1_acpower" = "1"
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register "c1_battery" = "1"
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register "c2_acpower" = "3"
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register "c2_battery" = "3"
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register "c3_acpower" = "5"
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register "c3_battery" = "5"
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device lapic 0x0 on end
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device lapic 0xacac off end
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end
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end
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register "pci_mmio_size" = "2048"
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device domain 0x0 on
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chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
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register "c2_latency" = "0x0065"
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register "docking_supported" = "0"
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register "gen1_dec" = "0x000c0291" # HWM
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register "p_cnt_throttling_supported" = "0"
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register "pcie_hotplug_map" = "{ 0, 0, 0, 0, 0, 0, 0, 0 }"
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register "sata_interface_speed_support" = "0x3"
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register "sata_port_map" = "0x33"
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register "spi_lvscc" = "0x2005"
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register "spi_uvscc" = "0x2005"
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device pci 16.0 on end # Management Engine Interface 1
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device pci 16.1 off end # Management Engine Interface 2
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device pci 16.2 off end # Management Engine IDE-R
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device pci 16.3 off end # Management Engine KT
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device pci 19.0 off end # Intel Gigabit Ethernet
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device pci 1a.0 on end # USB2 EHCI #2
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device pci 1b.0 on end # High Definition Audio Audio controller
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device pci 1c.0 on end # PCIe x1 Port (PCIEX1_1)
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device pci 1c.1 on end # PCIe x1 Port (PCIEX1_2)
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device pci 1c.2 on end # Realtek RTL8111E Ethernet Controller
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device pci 1c.3 on end # ASMedia ASM1042 USB3 Controller
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device pci 1c.4 on end # PCIe x1 Port, x16 size (PCIEX16_2)
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device pci 1c.5 on end # ASMedia ASM1062 SATA Controller
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device pci 1c.6 off end # Unused PCIe Port
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device pci 1c.7 off end # Unused PCIe Port
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device pci 1d.0 on end # USB2 EHCI #1
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device pci 1e.0 off end # PCI bridge
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device pci 1f.0 on # LPC bridge
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chip superio/nuvoton/nct6776
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device pnp 2e.0 off end # Floppy
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device pnp 2e.1 on # Parallel port
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io 0x60 = 0x378
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irq 0x70 = 5
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drq 0x74 = 4
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irq 0xf0 = 0x3c
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end
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device pnp 2e.2 on # COM1
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io 0x60 = 0x3f8
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irq 0x70 = 4
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end
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device pnp 2e.3 off end # COM2, IR
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device pnp 2e.5 on # Keyboard
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io 0x60 = 0x60
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io 0x62 = 0x64
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irq 0x70 = 1
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irq 0x72 = 12
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end
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device pnp 2e.6 off end # CIR
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device pnp 2e.7 off end # GPIO6-9
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device pnp 2e.8 off end # WDT1, GPIO0, GPIO1, GPIOA
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device pnp 2e.9 off end # GPIO2-5
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device pnp 2e.a on # ACPI
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irq 0xe5 = 0x06
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irq 0xe6 = 0x0c
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irq 0xe7 = 0x11
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irq 0xf0 = 0x20
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irq 0xf2 = 0x5d
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end
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device pnp 2e.b on # HWM, LED
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io 0x60 = 0x0290
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io 0x62 = 0x0200
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end
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device pnp 2e.d on end # VID
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device pnp 2e.e off end # CIR WAKE-UP
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device pnp 2e.f on # GPIO Push-Pull or Open-drain
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irq 0xf0 = 0x9d
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end
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device pnp 2e.14 on end # SVID
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device pnp 2e.16 on # Deep Sleep
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io 0x30 = 0x20
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end
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device pnp 2e.17 on # GPIOA
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irq 0xe0 = 0xff
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irq 0xe1 = 0xff
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irq 0xe2 = 0xff
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irq 0xe3 = 0xff
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irq 0xe5 = 0xff
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end
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end
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end
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device pci 1f.2 on end # SATA Controller 1
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device pci 1f.3 on end # SMBus
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device pci 1f.5 off end # SATA Controller 2
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device pci 1f.6 off end # Thermal
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end
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device pci 00.0 on end # Host bridge
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device pci 01.0 on end # PCIe bridge for discrete graphics (PCIEX16_1)
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device pci 02.0 on end # Internal graphics VGA controller
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end
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end
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