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Martin Roth 7e76883f35 Update fsp submodule to upstream master
Updating from commit id 10eae55:
2021-08-24 21:11:18 +0800 - (Elkhart Lake MR1 FSP)

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2022-01-29 00:32:47 +0800 - (Apollo Lake MR10 FSP)

This brings in 20 new commits:
f4bbf5a Apollo Lake MR10 FSP
aab8be0 Apollo Lake MR10 FSP
45b935f Apollo Lake MR10 FSP
755e782 Signed-off-by: Wong <swee.heng.wong@intel.com>
da956c1 Whitley FSP 2.2.0.3A
7e3d894 Whitley FSP 2.2.0.3A
04ad3cd Tiger Lake - UP3 IoT FSP MR4
ccf7f35 Elkhart Lake MR2 FSP
4aa1275 Elkhart Lake MR2 FSP
8aa6a9a Cedar Island FSP 2.2.0.3A
2e2e740 Whitley FSP 2.2.0.3A
91a6117 Tiger Lake - UP3 IoT FSP MR3
2863499 Delete FspUpd.h
df41c58 Delete FsptUpd.h
0d420eb Delete FspsUpd.h
53cc56a Delete FspmUpd.h
ad51318 Tiger Lake - UP3 IoT FSP MR3
63273a4 Delete Fsp.fd
ce61eb3 Tiger Lake - UP3 IoT FSP MR3
f7f77a2 Delete Fsp.bsf

Signed-off-by: Martin Roth <gaumless@gmail.com>
Change-Id: I6128b9703498dd36be73c19cbbfe349c206c6cf3
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60820
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
2022-03-01 01:53:17 +00:00
3rdparty Update fsp submodule to upstream master 2022-03-01 01:53:17 +00:00
Documentation Documentation: Fix broken link to Gerrit Guidelines 2022-02-28 19:30:17 +00:00
LICENSES treewide: Remove trailing whitespace 2021-02-17 17:30:05 +00:00
configs src/mainboard/emulation/qemu-power9/*: add QEMU POWER9 mainboard 2022-02-11 20:14:55 +00:00
payloads payloads/tianocore: Convert BMP at build time 2022-02-25 20:45:02 +00:00
spd spd/lp4x: Generate initial SPD for MT53E2G32D4NQ-046 WT:C 2022-02-24 00:31:25 +00:00
src lib/Makefile: Add ability to specify -ldflags for rmodules 2022-02-28 22:02:22 +00:00
tests tests/include: Move EMPTY_WRAP() macro to tests/include/test.h 2022-02-10 21:16:49 +00:00
util utils/cbfstool: Fix building with `make test-tools` 2022-02-27 18:29:24 +00:00
.checkpatch.conf lint: checkpatch: Only exclude specific src/vendorcode/ subdirectories 2021-04-06 16:04:41 +00:00
.clang-format
.editorconfig Add .editorconfig file 2019-09-10 12:52:18 +00:00
.gitignore .gitignore: Ignore .test/.dependencies globally 2020-10-31 18:21:36 +00:00
.gitmodules .gitmodules: Update intel-microcode submodule to track branch=main 2021-06-09 17:20:50 +00:00
.gitreview
AUTHORS AUTHORS, util/: Drop individual copyright notices 2020-05-09 21:21:32 +00:00
COPYING
MAINTAINERS MAINTAINERS: Add myself 2022-02-18 19:57:44 +00:00
Makefile Makefile: Add .SECONDARY 2022-02-28 22:00:42 +00:00
Makefile.inc Makefile: Add a build target for .map 2022-02-28 22:00:55 +00:00
README.md README.md: Remove link to deprecated wiki 2019-11-16 20:39:55 +00:00
gnat.adc treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
toolchain.inc build system: immediately report what users are supposed to look into 2021-10-18 16:39:25 +00:00

README.md

coreboot README

coreboot is a Free Software project aimed at replacing the proprietary BIOS (firmware) found in most computers. coreboot performs a little bit of hardware initialization and then executes additional boot logic, called a payload.

With the separation of hardware initialization and later boot logic, coreboot can scale from specialized applications that run directly firmware, run operating systems in flash, load custom bootloaders, or implement firmware standards, like PC BIOS services or UEFI. This allows for systems to only include the features necessary in the target application, reducing the amount of code and flash space required.

coreboot was formerly known as LinuxBIOS.

Payloads

After the basic initialization of the hardware has been performed, any desired "payload" can be started by coreboot.

See https://www.coreboot.org/Payloads for a list of supported payloads.

Supported Hardware

coreboot supports a wide range of chipsets, devices, and mainboards.

For details please consult:

Build Requirements

  • make
  • gcc / g++ Because Linux distribution compilers tend to use lots of patches. coreboot does lots of "unusual" things in its build system, some of which break due to those patches, sometimes by gcc aborting, sometimes - and that's worse - by generating broken object code. Two options: use our toolchain (eg. make crosstools-i386) or enable the ANY_TOOLCHAIN Kconfig option if you're feeling lucky (no support in this case).
  • iasl (for targets with ACPI support)
  • pkg-config
  • libssl-dev (openssl)

Optional:

  • doxygen (for generating/viewing documentation)
  • gdb (for better debugging facilities on some targets)
  • ncurses (for make menuconfig and make nconfig)
  • flex and bison (for regenerating parsers)

Building coreboot

Please consult https://www.coreboot.org/Build_HOWTO for details.

Testing coreboot Without Modifying Your Hardware

If you want to test coreboot without any risks before you really decide to use it on your hardware, you can use the QEMU system emulator to run coreboot virtually in QEMU.

Please see https://www.coreboot.org/QEMU for details.

Website and Mailing List

Further details on the project, a FAQ, many HOWTOs, news, development guidelines and more can be found on the coreboot website:

https://www.coreboot.org

You can contact us directly on the coreboot mailing list:

https://www.coreboot.org/Mailinglist

The copyright on coreboot is owned by quite a large number of individual developers and companies. Please check the individual source files for details.

coreboot is licensed under the terms of the GNU General Public License (GPL). Some files are licensed under the "GPL (version 2, or any later version)", and some files are licensed under the "GPL, version 2". For some parts, which were derived from other projects, other (GPL-compatible) licenses may apply. Please check the individual source files for details.

This makes the resulting coreboot images licensed under the GPL, version 2.