91ef92525d
Since the functions that get called by the coreboot console initialization code aren't in the SOC-specific code anymore, the SOC's uart.c can be included unconditionally in the build now. This also replaces the STONEYRIDGE_UART Kconfig option with the common AMD_SOC_CONSOLE_UART one. Change-Id: I09c15566a402895d6388715e8e5a802dc3c94fdd Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/49375 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
130 lines
2.9 KiB
Text
130 lines
2.9 KiB
Text
# SPDX-License-Identifier: GPL-2.0-only
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config BOARD_GOOGLE_BASEBOARD_KAHLEE
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bool
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select SOC_AMD_STONEYRIDGE
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select AMD_APU_STONEYRIDGE
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select AMD_APU_PKG_FT4
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select ALWAYS_LOAD_OPROM
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select ALWAYS_RUN_OPROM
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select BOARD_ROMSIZE_KB_16384
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select DRIVERS_I2C_GENERIC
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select DRIVERS_I2C_HID
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select EC_GOOGLE_CHROMEEC
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select EC_GOOGLE_CHROMEEC_BOARDID
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select EC_GOOGLE_CHROMEEC_LPC
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select HAVE_ACPI_TABLES
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select HAVE_SPD_IN_CBFS
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select GFXUMA
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select GOOGLE_SMBIOS_MAINBOARD_VERSION
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select MAINBOARD_HAS_CHROMEOS
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select SERIRQ_CONTINUOUS_MODE
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select AMD_SOC_CONSOLE_UART
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select SOC_AMD_SMU_FANLESS
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select HAVE_ACPI_RESUME
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select DRIVERS_GENERIC_BH720
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select MAINBOARD_HAS_I2C_TPM_CR50
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select MAINBOARD_HAS_TPM2
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select DRIVERS_GENERIC_ADAU7002
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select DRIVERS_GENERIC_MAX98357A
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select DRIVERS_I2C_DA7219
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select PCIEXP_ASPM
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select PCIEXP_CLK_PM
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select PCIEXP_COMMON_CLOCK
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select PCIEXP_L1_SUB_STATE
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select HAVE_EM100_SUPPORT
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select SYSTEM_TYPE_LAPTOP
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if BOARD_GOOGLE_BASEBOARD_KAHLEE
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config MAINBOARD_DIR
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string
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default "google/kahlee"
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config VGA_BIOS_FILE
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string
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default "3rdparty/blobs/mainboard/google/kahlee/aleena/VBIOS_015_049_000_018.bin" if BOARD_GOOGLE_ALEENA
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default "3rdparty/blobs/mainboard/google/kahlee/liara/VBIOS_BRT39865.001.bin" if BOARD_GOOGLE_LIARA
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default "3rdparty/blobs/mainboard/google/kahlee/VBIOS_015_049_000_017.bin"
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config VARIANT_DIR
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string
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default "aleena" if BOARD_GOOGLE_ALEENA
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default "careena" if BOARD_GOOGLE_CAREENA
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default "grunt" if BOARD_GOOGLE_GRUNT
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default "liara" if BOARD_GOOGLE_LIARA
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default "nuwani" if BOARD_GOOGLE_NUWANI
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default "treeya" if BOARD_GOOGLE_TREEYA
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config MAINBOARD_PART_NUMBER
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string
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default "Grunt"
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config DEVICETREE
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string
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default "variants/\$(CONFIG_VARIANT_DIR)/devicetree.cb"
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config MAINBOARD_FAMILY
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string
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default "Google_Kahlee"
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config FMDFILE
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string
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default "src/mainboard/\$(CONFIG_MAINBOARD_DIR)/variants/baseboard/chromeos.fmd" if CHROMEOS
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default ""
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help
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The build system creates a default FMAP from ROM_SIZE and CBFS_SIZE,
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but in some cases more complex setups are required.
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When an fmd is specified, it overrides the default format.
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config MAX_CPUS
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int
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default 4
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config IRQ_SLOT_COUNT
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int
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default 11
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config ONBOARD_VGA_IS_PRIMARY
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bool
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default y
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config VBOOT
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select EC_GOOGLE_CHROMEEC_SWITCHES
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select VBOOT_LID_SWITCH
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config VBOOT_VBNV_OFFSET
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hex
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default 0x2A
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config CHROMEOS
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select LP_DEFCONFIG_OVERRIDE if PAYLOAD_DEPTHCHARGE
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config AMD_FWM_POSITION_INDEX
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int
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default 1
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config DRIVER_TPM_I2C_BUS
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hex
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default 0x01
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config DRIVER_TPM_I2C_ADDR
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hex
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default 0x50
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config USE_OEM_BIN
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bool "Add an oem.bin file"
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help
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Add an oem.bin file to identify the manufacturer in SMBIOS, overriding the
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CONFIG_MAINBOARD_SMBIOS_MANUFACTURER value.
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config OEM_BIN_FILE
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string "OEM ID table"
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depends on USE_OEM_BIN
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default ""
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# Don't use AMD's Secure OS
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config USE_PSPSECUREOS
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def_bool n
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endif # BOARD_GOOGLE_BASEBOARD_KAHLEE
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