coreboot-kgpe-d16/util/nvramtool
Patrick Georgi c37b05c413 nvramtool: write size field more obviously
The field wasn't initialized in RAM first and later overwritten in a somewhat
twisted way (that relied on the size field coming after the tag field in the
struct).

Change-Id: Ibe931b297df51e3c46ae163e059338781f5a27e2
Found-by: Coverity Scan
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/4087
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins)
2013-11-19 00:59:55 +01:00
..
accessors nvramtool: write size field more obviously 2013-11-19 00:59:55 +01:00
cli nvramtool: Use CMOS_SIZE for cmos size 2013-05-04 00:14:11 +02:00
COPYING
ChangeLog
DISCLAIMER
Makefile GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« 2013-03-01 10:16:08 +01:00
Makefile.inc GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« 2013-03-01 10:16:08 +01:00
README
cbfs.c build: build coreboot on mingw. 2012-10-22 21:49:54 +02:00
cbfs.h Change "VERSION*" to more determined name "CBFS_HEADER_VERSION*". 2013-01-04 06:27:33 +01:00
cmos_lowlevel.c nvramtool: Remove the building warning on older gcc 2012-09-11 08:32:30 +02:00
cmos_lowlevel.h
cmos_ops.c nvramtool: Fix CMOS checksum to match coreboot (and /dev/nvram) 2011-10-22 10:33:26 +02:00
cmos_ops.h
common.c nvramtool: Unify nvramtool and build_opt_tbl 2012-04-21 09:36:24 +02:00
common.h build: build coreboot on mingw. 2012-10-22 21:49:54 +02:00
compute_ip_checksum.c
coreboot_tables.h
hexdump.c hexdump: fix compiler warning 2012-04-07 19:57:42 +02:00
hexdump.h
input_file.c
input_file.h
ip_checksum.h
layout.c
layout.h nvramtool: Unify nvramtool and build_opt_tbl 2012-04-21 09:36:24 +02:00
lbtable.c nvramtool: reduce memory mapping 2013-02-22 16:04:03 +01:00
lbtable.h
nvramtool.spec
reg_expr.c
reg_expr.h
win32mmap.c build: build coreboot on mingw. 2012-10-22 21:49:54 +02:00

README

Summary of Operation
--------------------
nvramtool is a utility for reading/writing coreboot parameters and
displaying information from the coreboot table.  It is intended for x86-based
systems (both 32-bit and 64-bit) that use coreboot.

The coreboot table resides in low physical memory, and may be accessed
through the /dev/mem interface.  It is created at boot time by coreboot, and
contains various system information such as the type of mainboard in use.  It
specifies locations in the CMOS (nonvolatile RAM) where the coreboot
parameters are stored.

For information about coreboot, see http://www.coreboot.org/.

Ideas for Future Improvements
-----------------------------
1.  Move the core functionality of this program into a shared library.
2.  Consider adding options for displaying other BIOS-provided information
    such as the MP table, ACPI table, PCI IRQ routing table, etc.