coreboot-kgpe-d16/src/soc
Kangheui Won 7fe005ff30 amd/picasso/acpi: Add power resources for UART0
Follow-up for a31a769 -
"amd/picasso/acpi: Add power resources for I2C and UART".
Now PSP properly handles UART0 D3, we can shutdown UART0.

BUG=b:158772504
TEST=suspend_stress_test for 50 cycles,
* echo 1 > /sys/module/acpi/parameters/aml_debug_output
* dmesg | grep FUR to check on&off for FUR0
[ 2413.647500] ACPI Debug:  "AOAC.FUR0._OFF"
[ 2413.736265] ACPI Debug:  "AOAC.FUR0._ON"

Change-Id: I25457e18b69d28a83e42c2fe02b45a3979ad58cd
Signed-off-by: Kangheui Won <khwon@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44266
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2020-08-11 23:16:42 +00:00
..
amd amd/picasso/acpi: Add power resources for UART0 2020-08-11 23:16:42 +00:00
cavium src: Remove unused 'include <types.h>' 2020-07-14 16:10:17 +00:00
intel soc/intel/common/block/gspi: Recalculate BAR after resource allocation 2020-08-11 20:54:34 +00:00
mediatek soc/mediatek/mt8192: Add initial config for new ARMv8 device MT8192 2020-08-08 03:41:13 +00:00
nvidia src: Remove unused 'include <stdint.h> 2020-07-14 16:11:10 +00:00
qualcomm qualcomm/sc7180: Fix TLMM assignments for GPIOs 29, 31 and 32 2020-08-03 05:13:07 +00:00
rockchip src/soc/rockchip: Add missing <{stddef,stdint}.h> 2020-07-29 09:37:22 +00:00
samsung src/soc/samsung/exynos{5250,s5420}: Add missing <{stddef,stdint}.h> 2020-07-29 09:34:55 +00:00
sifive treewide: Add Kconfig variable MEMLAYOUT_LD_FILE 2020-06-13 06:49:23 +00:00
ucb soc/ucb/riscv: Add chip_operations stub 2020-05-28 09:30:35 +00:00