coreboot-kgpe-d16/src/soc
Jimmy Zhang 7fea2707ef t210: Correct device MMIO range
Address region from 0x0 to 0x00ffffff is used for IROM_LOVEC and
can not be accessed by Bootloader.

Issue found in CL: 283104 is captured by this patch.

BUG=None
BRANCH=None
TEST=Compiles successfully and reboot test does not crash in firmware

Here are memory mapping table before and after this CL for evt2 board:

Before:
Mapping address range [0000000000000000:0000000040000000) as     cacheable | read-write |     secure | device
Mapping address range [0000000040000000:0000000040040000) as     cacheable | read-write | non-secure | normal
Mapping address range [0000000040040000:0000000080000000) as     cacheable | read-write |     secure | device
Mapping address range [0000000080000000:00000000feb00000) as     cacheable | read-write | non-secure | normal
Mapping address range [00000000fec00000:0000000100000000) as     cacheable | read-write |     secure | normal
Mapping address range [0000000100000000:0000000140000000) as     cacheable | read-write | non-secure | normal

After:
Mapping address range [0000000001000000:0000000040000000) as     cacheable | read-write |     secure | device
Mapping address range [0000000040000000:0000000040040000) as     cacheable | read-write | non-secure | normal
Mapping address range [0000000040040000:0000000080000000) as     cacheable | read-write |     secure | device
Mapping address range [0000000080000000:00000000feb00000) as     cacheable | read-write | non-secure | normal
Mapping address range [00000000fec00000:0000000100000000) as     cacheable | read-write |     secure | normal
Mapping address range [0000000100000000:0000000140000000) as     cacheable | read-write | non-secure | normal

Signed-off-by: Jimmy Zhang <jimmzhang@nvidia.com>

Change-Id: I07d38a8994c37bf945a68fb95a156c13f435ded2
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 3eee44944c2c83cc3530bfac0d71b86d3265f5b2
Original-Change-Id: I2b827064807ed715625af627db1826c3a01121ec
Original-Signed-off-by: Jimmy Zhang <jimmzhang@nvidia.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/285260
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/11015
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2015-07-21 21:27:21 +02:00
..
broadcom/cygnus Change #ifdef and #if defined CONFIG_ bools to #if IS_ENABLED() 2015-07-12 18:14:23 +02:00
imgtec/pistachio Remove address from GPLv2 headers 2015-06-24 07:09:24 +02:00
intel skylake: add global reset cause registers to power state 2015-07-21 21:20:12 +02:00
marvell/bg4cd marvel/bg4cd: move timestamp init to SoC code 2015-07-07 20:07:41 +02:00
nvidia t210: Correct device MMIO range 2015-07-21 21:27:21 +02:00
qualcomm/ipq806x ipq8064: enable timestamp collection 2015-07-09 00:11:37 +02:00
rockchip/rk3288 rk3288: Fix & vs && mix up in hdmi driver 2015-07-09 00:31:14 +02:00
samsung Remove empty lines at end of file 2015-06-08 00:55:07 +02:00
ucb/riscv Remove address from GPLv2 headers 2015-05-21 20:50:25 +02:00