coreboot-kgpe-d16/src
William wu 801a8ef2c3 rockchip/rk3399: Add Type-C PHY init
Though we don't use Type-C PHY to support USB3 in firmware,
we still need to initialize the Type-C PHY, and make sure
the power state of pipe is always fixed to U2/P2. After
this, we can force USB3 controller to work in USB2 only
mode.

BRANCH=none
BUG=chrome-os-partner:56425
TEST=Go to recovery mode, plug a Type-C USB drive containing
chrome OS image into both ports in all orientations, check if
system can boot from USB.

Change-Id: I95bb96ff27d4fecafb7b2b9e9dc2839b5c132654
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 8ec98507845276119d8a9d5626934dedcb35f2dd
Original-Change-Id: Ie3654cd1c1cb76b62aa9b247879b60cbecee0155
Original-Signed-off-by: William wu <wulf@rock-chips.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/391412
Original-Commit-Ready: Julius Werner <jwerner@chromium.org>
Original-Tested-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/16910
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-10-08 16:40:09 +02:00
..
acpi src/acpi: Capitalize ACPI and SATA 2016-07-31 19:25:40 +02:00
arch src/arch: Remove whitespace after sizeof 2016-10-07 18:08:48 +02:00
commonlib commonlib: move DIV_ROUND macros from nvidia/tegra 2016-09-07 20:52:42 +02:00
console Kconfig: Update default hex values to start with 0x 2016-10-02 19:08:15 +02:00
cpu src/cpu: Remove unnecessary whitespace 2016-10-07 18:08:25 +02:00
device Kconfig: Update default hex values to start with 0x 2016-10-02 19:08:15 +02:00
drivers soc/intel/apollolake: Implement stage cache to improve resume time 2016-10-07 18:18:14 +02:00
ec ec/google/chromeec: Add minimum delay between SPI CS assertions 2016-10-07 17:55:47 +02:00
include arm64: Use 'payload' format for ATF instead of 'stage' 2016-10-06 21:49:52 +02:00
lib soc/intel/apollolake: Implement stage cache to improve resume time 2016-10-07 18:18:14 +02:00
mainboard google/reef/variants/pyro: Add support for GPIO output polarity 2016-10-07 18:59:07 +02:00
northbridge src/northbridge: Remove unnecessary whitespace 2016-10-04 19:15:55 +02:00
soc rockchip/rk3399: Add Type-C PHY init 2016-10-08 16:40:09 +02:00
southbridge src/southbridge: Remove unnecessary whitespace 2016-10-07 18:09:06 +02:00
superio sio/winbond/w83627dhg: Add ACPI function to control suspend LED 2016-10-01 22:30:38 +02:00
vboot vboot: clear tpm when required 2016-09-30 03:08:22 +02:00
vendorcode vendorcode/intel/fsp: Update UPD headers for FSP 157_10 2016-10-07 19:13:53 +02:00
Kconfig Kconfig: Update default hex values to start with 0x 2016-10-02 19:08:15 +02:00