965c43b4db
- Correct default ROM image size for this board (512KB is correct). - devicetree.cb: Add AUX I/O config (mainly GPIO settings). This allows you to control the LEDs in the front panel and JP900/JP901 can be read. - irq_tables.c: Rework PIRQ table to make more onboard devices work. Also, avoid IRQ9. - mainboard.c: Drop unneeded functions, everything is done in devicetree.cb. Signed-off-by: Marc Bertens <mbertens@xs4all.nl> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6247 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
107 lines
4.2 KiB
Text
107 lines
4.2 KiB
Text
##
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## This file is part of the coreboot project.
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##
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## Copyright (C) 2010 Marc Bertens <mbertens@xs4all.nl>
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##
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## This program is free software; you can redistribute it and/or modify
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## it under the terms of the GNU General Public License as published by
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## the Free Software Foundation; either version 2 of the License, or
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## (at your option) any later version.
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##
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## This program is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU General Public License for more details.
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##
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## You should have received a copy of the GNU General Public License
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## along with this program; if not, write to the Free Software
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## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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##
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chip northbridge/intel/i440bx # Northbridge
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device lapic_cluster 0 on # (L)APIC cluster
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chip cpu/intel/socket_PGA370 # CPU socket
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device lapic 0 on end # Local APIC of the CPU
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end
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end
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device pci_domain 0 on # PCI domain
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device pci 0.0 on end # Host bridge
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device pci 1.0 on end # PCI/AGP bridge
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chip southbridge/intel/i82371eb # Southbridge
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device pci 7.0 on # ISA bridge
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chip superio/smsc/smscsuperio # Super I/O (SMSC FDC37B787)
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device pnp 3f0.0 off end # Floppy (No connector)
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device pnp 3f0.3 off end # Parallel port (No connector)
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device pnp 3f0.4 on # COM1
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io 0x60 = 0x3f8
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irq 0x70 = 4
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end
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device pnp 3f0.5 on # COM2 / IR
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io 0x60 = 0x2f8
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irq 0x70 = 3
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end
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device pnp 3f0.6 on # RTC
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irq 0x63 = 0x72
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end
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device pnp 3f0.7 off # PS/2 keyboard / mouse (No connector)
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end
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device pnp 3f0.8 on # AUX I/O
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irq 0x24 = 0x84 # OSC
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irq 0xB2 = 0x0C # Soft power status 1
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irq 0xB3 = 0x05 # Soft power status 2
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irq 0xC0 = 0x03 # IRQ MUX control
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irq 0xC8 = 0x10 # GP50 = (I/O) output = Flashrom enable
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irq 0xCA = 0x09 # GP52 = IRQ8 (output)
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irq 0xCB = 0x01 # GP53 = nROMCS (output)
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irq 0xCC = 0x11 # GP54 = (I/O) input
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irq 0xF9 = 0x00 # read/write GP5x lines (0x1C)
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irq 0xD0 = 0x08 # GP60 = IRQ1
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irq 0xD1 = 0x08 # GP61 = IRQ3
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irq 0xD2 = 0x08 # GP62 = IRQ4
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irq 0xD3 = 0x11 # GP63 = (I/O) input = JP901 on board
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irq 0xD4 = 0x11 # GP64 = (I/O) input
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irq 0xD5 = 0x11 # GP65 = (I/O) input
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irq 0xD6 = 0x08 # GP66 = IRQ8
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irq 0xD7 = 0x11 # GP67 = (I/O) input
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irq 0xFA = 0x00 # read/write GP6x lines (0x88)
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irq 0xE0 = 0x00 # GP10 (I/O) = output
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irq 0xE1 = 0x01 # GP11 (I/O) = input
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irq 0xE2 = 0x08 # GP12 = P17
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irq 0xE3 = 0x00 # GP13 (I/O) = output = LED fault on front, active low
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irq 0xE4 = 0x00 # GP14 (I/O) = output
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irq 0xE5 = 0x00 # GP15 (I/O) = output
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irq 0xE6 = 0x01 # GP16 (I/O) = input = JP900 on board, low on short, high on open
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irq 0xE7 = 0x00 # GP17 (I/O) = output = LED alert on front, active low
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irq 0xF6 = 0xFF # read/write GP1x lines (0xCA)
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irq 0xEF = 0x00 # GP_INT2 disable
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irq 0xF0 = 0x00 # GP_INT1 disable
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irq 0xF1 = 0x00 # WDT_UNITS
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irq 0xF2 = 0x00 # WDT_VAL
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irq 0xF3 = 0x00 # WDT_CFG
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irq 0xF4 = 0x20 # WDT_CTRL (stop-cnt)
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end
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device pnp 3f0.a off # ACPI (No support yet)
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# irq 0x60 = 0x0C
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# irq 0x61 = 0x80
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end
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end
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end
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device pci 7.1 on end # IDE
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device pci 7.2 off end # USB (No connector)
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device pci 7.3 off end # ACPI (No support yet)
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register "ide0_enable" = "1"
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register "ide1_enable" = "1"
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register "ide_legacy_enable" = "1"
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# Disable UDMA/33 for lower speed if your IDE device(s) don't support it.
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register "ide0_drive0_udma33_enable" = "1"
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register "ide0_drive1_udma33_enable" = "1"
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register "ide1_drive0_udma33_enable" = "1"
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register "ide1_drive1_udma33_enable" = "1"
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end
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end
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end
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