Michael Niewöhner 80bd8e43b0 mb/system76/lemp9: correct CBFS_SIZE ... The BIOS region size is 0xc00000, not 0xa00000. Correct this. Change-Id: I88cb0d4b9a590a32672054aa0db7f9a92070ff6d Signed-off-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/45504 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Singer <felixsinger@posteo.net>		2020-09-20 21:32:32 +00:00
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acpi	acpi: Correct sizes for ACPI data fields	2020-09-15 13:41:58 +00:00
arch	memory_info: add max_speed_mts and configured_speed_mts	2020-09-03 21:27:54 +00:00
commonlib	util/cbfstool: extend includes in commonlib	2020-09-14 07:10:53 +00:00
console	ec/system76: Add console support	2020-09-07 21:46:34 +00:00
cpu	cpu/intel/model_1067x: enable PECI	2020-09-12 10:50:33 +00:00
device	lint: check for misuse of Kconfig SUBSYSTEM_*_ID	2020-09-20 17:03:32 +00:00
drivers	drivers/genesyslogic/gl9755: Add driver for Genesys Logic GL9755	2020-09-18 15:49:15 +00:00
ec	ec/google/chromeec: Add dptc interface support	2020-09-17 06:18:59 +00:00
include	drivers/genesyslogic/gl9755: Add driver for Genesys Logic GL9755	2020-09-18 15:49:15 +00:00
lib	region_file_update_data_arr: Modify region_file with array of buffers	2020-09-16 16:02:54 +00:00
mainboard	mb/system76/lemp9: correct CBFS_SIZE	2020-09-20 21:32:32 +00:00
northbridge	nb/intel/haswell: Put DMIBAR/EPBAR registers into separate files	2020-09-17 20:22:31 +00:00
security	security/intel/txt/getsec.c: Do not check lock bit	2020-08-30 19:26:48 +00:00
soc	soc/amd/picasso: Add THERMCTL_LIMIT DPTC parameter support	2020-09-20 17:24:40 +00:00
southbridge	soc/amd/picasso: Fix typo of Kconfig setting	2020-09-20 02:47:27 +00:00
superio	superio/nuvoton: Inline `nuvoton_hwm_select_bank`	2020-09-18 12:37:36 +00:00
vendorcode	chromeos: Provide common watchdog reboot support in romstage	2020-09-15 01:09:38 +00:00
Kconfig	Kconfig: Update ASan config options	2020-08-21 07:42:21 +00:00