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Marshall Dawson 80d0b01b38 soc/amd/picasso: Update TSC and monotonic timer
Picasso's TimeStamp Counter is a new design and different than
Stoney Ridge.  Although advertised as invariant, the ST TSC did
not become so until midway through POST making it an unreliable
source for measuring time.  This is not the case for Picasso.

Remove the Stoney Ridge monotonic timer code and rely on the TSC.

Modify the calculation used in Family 15h of finding the number
of boost states first, and get the frequency directly out of the
Pstate0 register.

Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Change-Id: I909743483309279eb8c3bf68852d6082381f0dff
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33765
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Richard Spiegel <richard.spiegel@silverbackltd.com>
2019-09-09 22:20:08 +00:00
3rdparty 3rdparty/ffs: add open-power ffs utils 2019-08-25 07:37:11 +00:00
Documentation superio/common: Add ssdtgen for generic SuperIOs 2019-09-06 15:31:06 +00:00
configs cpu/x86/smm: Promote smm_memory_map() 2019-08-15 05:46:59 +00:00
payloads payloads/external/LinuxBoot: Add curl flag 2019-09-02 06:38:57 +00:00
src soc/amd/picasso: Update TSC and monotonic timer 2019-09-09 22:20:08 +00:00
util util/sconfig: Expose usable PCI and PNP device names 2019-09-06 00:18:29 +00:00
.checkpatch.conf
.clang-format lint/clang-format: set to 96 chars per line 2019-06-13 20:14:00 +00:00
.gitignore util/bucts: Add tool to manipulate BUC.TS bit on Intel targets 2018-11-19 08:19:16 +00:00
.gitmodules 3rdparty/ffs: add open-power ffs utils 2019-08-25 07:37:11 +00:00
.gitreview
AUTHORS AUTHORS: Move src/arch/ppc64 copyrights into AUTHORS file 2019-08-28 09:21:05 +00:00
COPYING
MAINTAINERS MAINTAINERS: Step down as RISC-V maintainer 2019-08-05 22:43:36 +00:00
Makefile Makefile: Move the .xcompile rule out of the if !NOCOMPILE block 2019-08-28 09:22:09 +00:00
Makefile.inc Makefile: Pass .xcompile into genbuild_h 2019-08-28 18:29:15 +00:00
README.md README: Convert to Markdown 2018-09-16 13:01:58 +00:00
gnat.adc
toolchain.inc Split MAYBE_STATIC to _BSS and _NONZERO variants 2019-08-26 20:56:29 +00:00

README.md

coreboot README

coreboot is a Free Software project aimed at replacing the proprietary BIOS (firmware) found in most computers. coreboot performs a little bit of hardware initialization and then executes additional boot logic, called a payload.

With the separation of hardware initialization and later boot logic, coreboot can scale from specialized applications that run directly firmware, run operating systems in flash, load custom bootloaders, or implement firmware standards, like PC BIOS services or UEFI. This allows for systems to only include the features necessary in the target application, reducing the amount of code and flash space required.

coreboot was formerly known as LinuxBIOS.

Payloads

After the basic initialization of the hardware has been performed, any desired "payload" can be started by coreboot.

See https://www.coreboot.org/Payloads for a list of supported payloads.

Supported Hardware

coreboot supports a wide range of chipsets, devices, and mainboards.

For details please consult:

Build Requirements

  • make
  • gcc / g++ Because Linux distribution compilers tend to use lots of patches. coreboot does lots of "unusual" things in its build system, some of which break due to those patches, sometimes by gcc aborting, sometimes - and that's worse - by generating broken object code. Two options: use our toolchain (eg. make crosstools-i386) or enable the ANY_TOOLCHAIN Kconfig option if you're feeling lucky (no support in this case).
  • iasl (for targets with ACPI support)
  • pkg-config
  • libssl-dev (openssl)

Optional:

  • doxygen (for generating/viewing documentation)
  • gdb (for better debugging facilities on some targets)
  • ncurses (for make menuconfig and make nconfig)
  • flex and bison (for regenerating parsers)

Building coreboot

Please consult https://www.coreboot.org/Build_HOWTO for details.

Testing coreboot Without Modifying Your Hardware

If you want to test coreboot without any risks before you really decide to use it on your hardware, you can use the QEMU system emulator to run coreboot virtually in QEMU.

Please see https://www.coreboot.org/QEMU for details.

Website and Mailing List

Further details on the project, a FAQ, many HOWTOs, news, development guidelines and more can be found on the coreboot website:

https://www.coreboot.org

You can contact us directly on the coreboot mailing list:

https://www.coreboot.org/Mailinglist

The copyright on coreboot is owned by quite a large number of individual developers and companies. Please check the individual source files for details.

coreboot is licensed under the terms of the GNU General Public License (GPL). Some files are licensed under the "GPL (version 2, or any later version)", and some files are licensed under the "GPL, version 2". For some parts, which were derived from other projects, other (GPL-compatible) licenses may apply. Please check the individual source files for details.

This makes the resulting coreboot images licensed under the GPL, version 2.