Eric Lai 812f36425e mb/google/brya: Set UART console ... Follow latest schematic UART_PCH_DBG is UART 0. BUG=b:174266035 TEST=Build Test Signed-off-by: Eric Lai <ericr_lai@compal.corp-partner.google.com> Change-Id: I8e334fee1adcd79d058b7ab07127f8ecf1735202 Reviewed-on: https://review.coreboot.org/c/coreboot/+/48070 Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>		2020-12-04 21:09:20 +00:00
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variants	mb/google/brya: Add GPIO stubs	2020-12-02 23:00:36 +00:00
board_info.txt
bootblock.c	mb/google/brya: Add GPIO stubs	2020-12-02 23:00:36 +00:00
chromeos.fmd
dsdt.asl	mb/google/brya: Enable ACPI and add ACPI table	2020-12-04 21:09:07 +00:00
Kconfig	mb/google/brya: Set UART console	2020-12-04 21:09:20 +00:00
Kconfig.name
mainboard.c	mb/google/brya: Add GPIO stubs	2020-12-02 23:00:36 +00:00
Makefile.inc	mb/google/brya: Add GPIO stubs	2020-12-02 23:00:36 +00:00
romstage.c	mb/google/brya: Add entry stubs of each stage	2020-12-02 23:00:28 +00:00