0aa37c488b
The name lapic_cluster is a bit misleading, since the construct is not local APIC specific by concept. As implementations and hardware change, be more generic about our naming. This will allow us to support non-x86 systems without adding new keywords. Change-Id: Icd7f5fcf6f54d242eabb5e14ee151eec8d6cceb1 Signed-off-by: Stefan Reinauer <reinauer@google.com> Signed-off-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: http://review.coreboot.org/2377 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
21 lines
576 B
Text
21 lines
576 B
Text
chip northbridge/amd/gx2
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device cpu_cluster 0 on
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chip cpu/amd/geode_gx2
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device lapic 0 on end
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end
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end
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device domain 0 on
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device pci 1.0 on end
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device pci 1.1 on end
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chip southbridge/amd/cs5536
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register "lpc_serirq_enable" = "0x80" # enabled with default timing
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device pci d.0 on end # Realtek 8139 LAN
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device pci f.0 on end # ISA Bridge
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device pci f.2 on end # IDE Controller
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device pci f.3 on end # Audio
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device pci f.4 on end # OHCI
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device pci f.5 on end # EHCI
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end
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end
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end
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