coreboot-kgpe-d16/src
Kyösti Mälkki 823020d56b intel i945 gm45 x4x post-car: Use postcar_frame for MTRR setup
Adapt implementation from skylake to prepare for removal of
HIGH_MEMORY_SAVE and moving on to RELOCATABLE_RAMSTAGE.
With this change, CBMEM region is set early-on as WRBACK
with MTRRs and romstage ram stack is moved to CBMEM.

Change-Id: Idee5072fd499aa3815b0d78f54308c273e756fd1
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/15791
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-12-11 08:57:17 +01:00
..
acpi
arch postcar_loader: Support LATE_CBMEM_INIT boards 2016-12-09 23:54:34 +01:00
commonlib buildsystem: Drop explicit (k)config.h includes 2016-12-08 19:46:53 +01:00
console Hook up libhwbase in ramstage 2016-11-29 23:45:40 +01:00
cpu intel i945 gm45 x4x post-car: Use postcar_frame for MTRR setup 2016-12-11 08:57:17 +01:00
device buildsystem: Drop explicit (k)config.h includes 2016-12-08 19:46:53 +01:00
drivers buildsystem: Drop explicit (k)config.h includes 2016-12-08 19:46:53 +01:00
ec buildsystem: Drop explicit (k)config.h includes 2016-12-08 19:46:53 +01:00
include x86 SMM: Fix use with RELOCATABLE_RAMSTAGE 2016-12-11 08:56:40 +01:00
lib cbfs: Add API to locate a file from specific region 2016-12-10 03:16:55 +01:00
mainboard intel i945 gm45 x4x post-car: Use postcar_frame for MTRR setup 2016-12-11 08:57:17 +01:00
northbridge intel i945 gm45 x4x post-car: Use postcar_frame for MTRR setup 2016-12-11 08:57:17 +01:00
soc x86 SMM: Fix use with RELOCATABLE_RAMSTAGE 2016-12-11 08:56:40 +01:00
southbridge x86 SMM: Fix use with RELOCATABLE_RAMSTAGE 2016-12-11 08:56:40 +01:00
superio sio/ite/it8783ef: New super i/o chip 2016-12-07 20:02:17 +01:00
vboot commonlib/include: remove NEED_VB20_INTERNALS 2016-11-19 16:57:27 +01:00
vendorcode buildsystem: Drop explicit (k)config.h includes 2016-12-08 19:46:53 +01:00
Kconfig PCI ops: MMCONF_SUPPORT_DEFAULT is required 2016-12-07 12:59:28 +01:00