Subrata Banik 828c39eb6b soc/intel/common/block: Fix SATA chipset register definitions anomalies ... SATA PCH configuration space registers bit mapping is different for various SOCs hence common API between SPT-PCH and CNL-PCH causing issue. Add new Kconfig option to address this delta between different PCH. Change-Id: Iafed4fe09fe513c8087453ea78364a693e1e8a8a Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/23589 Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>		2018-02-07 08:09:12 +00:00
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apollolake	soc/intel/appololake: Remove dead MPINIT code selection	2018-02-06 15:30:49 +00:00
baytrail	security/tpm: Change TPM naming for different layers.	2018-01-18 01:45:35 +00:00
braswell	intel: Prepare registers so Windows drivers are happier	2018-01-29 09:41:35 +00:00
broadwell	security/tpm: Change TPM naming for different layers.	2018-01-18 01:45:35 +00:00
cannonlake	soc/intel/cannonlake: Increase heap size	2018-02-06 15:21:37 +00:00
common	soc/intel/common/block: Fix SATA chipset register definitions anomalies	2018-02-07 08:09:12 +00:00
denverton_ns	drivers/intel/fsp2_0: Unbind UDK2015 Kconfig from FSP2.0 driver	2018-01-31 05:56:19 +00:00
fsp_baytrail	soc/intel/fsp_baytrail: remove nvm headers and code	2017-12-17 18:29:08 +00:00
fsp_broadwell_de	Constify struct cpu_device_id instances	2017-11-23 05:00:17 +00:00
quark	drivers/spi: support cmd opcode deduction for spi_crop_chunk()	2018-01-30 05:37:47 +00:00
skylake	soc/intel/skylake: Add Kabylake PCH H device ID's	2018-02-07 01:47:51 +00:00
Kconfig	soc: Add Kconfig for each soc vendor	2017-10-23 17:18:32 +00:00