Ed Swierk 83a965d2ef Implement GPIO configuration routines for the Intel 3100 southbridge, ... allowing you to specify per-mainboard GPIO settings. Signed-off-by: Ed Swierk <eswierk@arastra.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3290 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1		2008-05-07 21:57:12 +00:00
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esb6300	The early init code of several Intel southbridge chipsets calls	2008-04-01 02:36:59 +00:00
i3100	Implement GPIO configuration routines for the Intel 3100 southbridge,	2008-05-07 21:57:12 +00:00
i82371eb	Please bear with me - another rename checkin. This qualifies as trivial, no	2008-01-18 10:35:56 +00:00
i82801ca	The early init code of several Intel southbridge chipsets calls	2008-04-01 02:36:59 +00:00
i82801dbm	The early init code of several Intel southbridge chipsets calls	2008-04-01 02:36:59 +00:00
i82801er	The early init code of several Intel southbridge chipsets calls	2008-04-01 02:36:59 +00:00
i82801xx	This patch halts the tco timer early in the boot process on all ICH series southbridges.	2008-04-06 04:26:19 +00:00
i82870	Ever wondered where those "setting incorrect section attributes for	2007-10-24 09:08:58 +00:00
pxhd	Ever wondered where those "setting incorrect section attributes for	2007-10-24 09:08:58 +00:00