coreboot-kgpe-d16/src/soc/intel
Angel Pons 83bdb45116 soc/intel/denverton_ns: Drop redundant DEFAULT_ACPI_BASE
It is only used in one place, and there's two other equivalent macros.

Change-Id: I7c8241e28f688abd2df8180559dd02ee441c7023
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49282
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
2021-01-12 13:37:10 +00:00
..
alderlake soc/intel/alderlake: Add PCH ID 0x5182 2021-01-12 05:18:51 +00:00
apollolake soc/intel/uart: Drop SoC callback soc_uart_console_to_device 2021-01-11 07:41:22 +00:00
baytrail ACPI: Add missing include in nvs.h 2021-01-10 11:40:45 +00:00
braswell mb/google/cyan: Move board_id() to mainboard_fill_gnvs() 2021-01-10 11:41:32 +00:00
broadwell soc/intel/broadwell: Use mp_cpu_bus_init 2021-01-10 16:11:32 +00:00
cannonlake soc/intel/cnl: add SLP_S0 residency register and enable LPIT support 2021-01-11 20:49:30 +00:00
common soc/intel/common/pcie: Add helper function for getting mask of enabled ports 2021-01-12 08:00:33 +00:00
denverton_ns soc/intel/denverton_ns: Drop redundant DEFAULT_ACPI_BASE 2021-01-12 13:37:10 +00:00
elkhartlake soc/intel/{icl,tgl,jsl,ehl}: add LPIT support 2021-01-11 20:49:53 +00:00
icelake soc/intel/{icl,tgl,jsl,ehl}: add LPIT support 2021-01-11 20:49:53 +00:00
jasperlake soc/intel/{icl,tgl,jsl,ehl}: add LPIT support 2021-01-11 20:49:53 +00:00
quark ACPI: Drop redundant CBMEM_ID_ACPI_GNVS allocations 2021-01-10 11:15:10 +00:00
skylake soc/intel/skl: add SLP_S0 residency register and enable LPIT support 2021-01-11 20:49:43 +00:00
tigerlake soc/intel/{icl,tgl,jsl,ehl}: add LPIT support 2021-01-11 20:49:53 +00:00
xeon_sp soc/intel: Rename to soc_fill_gnvs() 2021-01-10 11:40:22 +00:00
Kconfig