Aamir Bohra 83f7baec30 soc/intel/common: Add PCI configuration code for UART ... Add PCI configuration code support for intel/common/ block/uart module. Change-Id: Ibce5623ffb879f2427b759106d1f350601837e4b Signed-off-by: Aamir Bohra <aamir.bohra@intel.com> Reviewed-on: https://review.coreboot.org/19490 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>		2017-05-09 17:55:28 +02:00
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apollolake	soc/intel/apollolake: remove southbridge_clear_smi_status()	2017-05-08 06:10:42 +02:00
baytrail	drivers/spi: Re-factor spi_crop_chunk	2017-05-05 23:42:19 +02:00
braswell	drivers/spi: Re-factor spi_crop_chunk	2017-05-05 23:42:19 +02:00
broadwell	drivers/spi: Re-factor spi_crop_chunk	2017-05-05 23:42:19 +02:00
common	soc/intel/common: Add PCI configuration code for UART	2017-05-09 17:55:28 +02:00
fsp_baytrail	drivers/spi: Re-factor spi_crop_chunk	2017-05-05 23:42:19 +02:00
fsp_broadwell_de	drivers/spi: Re-factor spi_crop_chunk	2017-05-05 23:42:19 +02:00
quark	soc/intel/quark: Add SD/MMC test support	2017-05-08 19:13:35 +02:00
sch	nb/intel/*/northbridge.c: Remove #include <device/hypertransport.h>	2017-01-06 18:15:03 +01:00
skylake	soc/intel/skylake: Use intel/common/block/smbus code	2017-05-09 17:52:30 +02:00