Rob Barnes 847a39fec7 soc/amd/psp_verstage: Split up verstage_soc_init ... Make psp verstage initialization more granular be splitting verstage_soc_init into separate functions. Specifically, create soc init functions for espi, i2c spi, and aoac. BUG=b:200578885 BRANCH=None TEST=Build and boot guybrush Change-Id: I489889a0dfd4016aa4f2b53a2c6a7a1ea4459e60 Signed-off-by: Rob Barnes <robbarnes@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/59318 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Kangheui Won <khwon@chromium.org>		2021-11-17 14:30:01 +00:00
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cezanne	lib/prog_loaders, soc/amd/: Make payload_preload use cbfs_preload	2021-11-16 18:20:31 +00:00
common	soc/amd/psp_verstage: Split up verstage_soc_init	2021-11-17 14:30:01 +00:00
picasso	Rename ECAM-specific MMCONF Kconfigs	2021-11-10 17:24:16 +00:00
stoneyridge	amdfwtool: Set soc name for Stoneyridge	2021-11-15 10:06:39 +00:00
Kconfig