coreboot-kgpe-d16/src
Elyes HAOUAS 85c681e279 mb/amd: Drop unneeded empty lines
Change-Id: Ib82689150689716bc9afdf8d4527a1dcd5deae56
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44612
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2020-08-31 06:30:16 +00:00
..
acpi src/acpi: Drop unneeded empty lines 2020-08-24 09:16:59 +00:00
arch symbols: Change implementation details of DECLARE_OPTIONAL_REGION() 2020-08-27 22:11:17 +00:00
commonlib src: Remove incorrect x86 exception not from TS_DONE_LOADING description 2020-08-28 06:07:37 +00:00
console src: Remove unused 'include <stddef.h> 2020-08-18 12:15:44 +00:00
cpu cpu/intel/haswell: Set LT_LOCK_MEMORY MSR on finalize step 2020-08-30 19:25:43 +00:00
device {sb/intel/*/azalia.c,device/azalia_device.c}: Reduce differences 2020-08-17 06:58:45 +00:00
drivers mrc_cache: Move mrc_cache_stash_data to end of file 2020-08-24 23:31:26 +00:00
ec ec/google/chromeec: Add helper to request AP reset 2020-08-14 08:35:15 +00:00
include PCI IDs: Add PCI ID for CML DPTF/DTT PCI device 2020-08-29 01:59:02 +00:00
lib symbols: Change implementation details of DECLARE_OPTIONAL_REGION() 2020-08-27 22:11:17 +00:00
mainboard mb/amd: Drop unneeded empty lines 2020-08-31 06:30:16 +00:00
northbridge nb/intel/sandybridge: Add ECC error injection register information 2020-08-31 06:28:09 +00:00
security security/intel/txt/getsec.c: Do not check lock bit 2020-08-30 19:26:48 +00:00
soc PCI IDs: Add PCI ID for CML DPTF/DTT PCI device 2020-08-29 01:59:02 +00:00
southbridge sb/intel/bd82x6x: Factor out common ME functions 2020-08-29 20:15:37 +00:00
superio superio/winbond/wpcd376i: Resurrect the driver 2020-08-31 06:29:47 +00:00
vendorcode vendorcode/google: Add error handling 2020-08-31 06:28:45 +00:00
Kconfig Kconfig: Update ASan config options 2020-08-21 07:42:21 +00:00