c22ad581c8
POWER8 is a specific implementation of ppc64, which is by now outdated (POWER9 has been on the market for a while). Rename arch/power8/ to potentially cover a wider range of hardware. TEST=Toolchains built before/after this commit can build coreboot for emulation/qemu-power8 from before/after this commit. Change-Id: I2d6f08b12a9ffc8a652ddcd6f24ad85ecb33ca52 Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-on: https://review.coreboot.org/c/29943 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Timothy Pearson <tpearson@raptorengineering.com>
32 lines
995 B
Markdown
32 lines
995 B
Markdown
Upcoming release - coreboot 4.9
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==========================
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The 4.9 release is planned for November 2018
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Update this document with changes that should be in the release
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notes.
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* Please use Markdown.
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* See the [4.7](coreboot-4.7-relnotes.md) and [4.8](coreboot-4.8.1-relnotes.md)
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release notes for the general format.
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* The chip and board additions and removals will be updated right
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before the release, so those do not need to be added.
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General changes
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---------------
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* Various code cleanups
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* Removed `device_t` in favor of `struct device*` in ramstage code
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* Improve adherence to coding style
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* Expand use of the postcar stage
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* Add bootblock compression capability: on systems that copy the bootblock
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from very slow flash to ERAM, allow adding a stub that decompresses the
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bootblock into ERAM to minimize the amount of flash reads
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* Rename the POWER8 architecture port to PPC64 to reflect that it isn't limited
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to POWER8
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Toolchain
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---------
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* Update IASL to version 10280531
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