coreboot-kgpe-d16/Documentation/releases/coreboot-4.9-relnotes.md
Jonathan Neuschäfer c22ad581c8 arch/power8: Rename to ppc64
POWER8 is a specific implementation of ppc64, which is by now outdated
(POWER9 has been on the market for a while). Rename arch/power8/ to
potentially cover a wider range of hardware.

TEST=Toolchains built before/after this commit can build coreboot for
     emulation/qemu-power8 from before/after this commit.

Change-Id: I2d6f08b12a9ffc8a652ddcd6f24ad85ecb33ca52
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/c/29943
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Timothy Pearson <tpearson@raptorengineering.com>
2018-11-30 20:02:17 +00:00

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Markdown

Upcoming release - coreboot 4.9
==========================
The 4.9 release is planned for November 2018
Update this document with changes that should be in the release
notes.
* Please use Markdown.
* See the [4.7](coreboot-4.7-relnotes.md) and [4.8](coreboot-4.8.1-relnotes.md)
release notes for the general format.
* The chip and board additions and removals will be updated right
before the release, so those do not need to be added.
General changes
---------------
* Various code cleanups
* Removed `device_t` in favor of `struct device*` in ramstage code
* Improve adherence to coding style
* Expand use of the postcar stage
* Add bootblock compression capability: on systems that copy the bootblock
from very slow flash to ERAM, allow adding a stub that decompresses the
bootblock into ERAM to minimize the amount of flash reads
* Rename the POWER8 architecture port to PPC64 to reflect that it isn't limited
to POWER8
Toolchain
---------
* Update IASL to version 10280531