coreboot-kgpe-d16/src/cpu
Shelley Chen 6c2568f4f5 drivers/spi: Add BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES config
Added new config BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES to accomodate
older x86 platforms that don't allow writing to SPI flash when early
stages are running XIP from flash.  If
BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES is not selected,
BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY will get auto-selected if
BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y.  This allows for current platforms
that write to flash in the earlier stages, assuming that they have
that capability.

BUG=b:150502246
BRANCH=None

TEST=diff the coreboot.rom files resulting from running
     ./util/abuild/abuild -p none -t GOOGLE_NAMI -x -a --timeless
     with and without this change to make sure that there was no
     difference.  Also did this for GOOGLE_CANDY board, which is
     baytrail based (and has BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES
     enabled).

Change-Id: I3aef8be702f55873233610b8e20d0662aa951ca7
Signed-off-by: Shelley Chen <shchen@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45740
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
2020-10-02 23:11:04 +00:00
..
amd arch/x86: Introduce `ARCH_ALL_STAGES_X86_32` 2020-09-26 11:42:28 +00:00
armltd Kconfig: comply to Linux 5.3's Kconfig language rules 2019-11-23 20:09:56 +00:00
intel drivers/spi: Add BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES config 2020-10-02 23:11:04 +00:00
qemu-power8 src: Remove leading blank lines from SPDX header 2020-05-18 07:00:27 +00:00
qemu-x86 cpu/qemu-x86/car: Move long mode entry right before c entry 2020-09-29 12:27:04 +00:00
x86 cpu/x86/smm/smihandler.c: Implement smm_get_save_state() 2020-09-29 05:59:59 +00:00
Kconfig arch/x86: Implement RESET_VECTOR_IN_RAM 2020-04-29 05:38:00 +00:00
Makefile.inc cpu/Makefile.inc: Clean up non-existing directory inclusion 2020-08-17 06:24:23 +00:00