Tim Chu 13c44457f1 soc/intel/xeon_sp: Move codes to support new PCH ... Different PCHs have different definitions for registers. Here create a lbg folder and move lbg specific codes to this folder so that we can add new PCH code under xeon_sp folder. * Create lbg folder and move lbg specific codes from pch.c to soc_pch.c under lbg folder. * Rename lewisburg_pch_gpio_defs.h to gpio_soc_defs.h and move to lbg folder. * Rename gpio.c to soc_gpio.c and move to lbg folder. * Move pcr_ids.h to lbg folder. * Move lbg specific codes from pmutil.c to soc_pmutil.c under lbg folder. * Create and revise makefile for files under lbg folder. TEST=Can boot into OS on OCP Delta Lake. Signed-off-by: Tim Chu <Tim.Chu@quantatw.com> Change-Id: I06555ed6612c632ea2ce1938d81781cd9348017a Reviewed-on: https://review.coreboot.org/c/coreboot/+/70009 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>		2022-12-22 19:05:13 +00:00
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deltalake	mb/ocp: Provide better defaults for UART	2022-12-12 13:51:46 +00:00
tiogapass	soc/intel/xeon_sp: Move codes to support new PCH	2022-12-22 19:05:13 +00:00
Kconfig
Kconfig.name