b4953a93aa
As far as I can see this Kconfig option was used wrong ever since it
was added. According to the commit message of 107f72e (Re-declare
CACHE_ROM_SIZE as aligned ROM_SIZE for MTRR), it was only necessary
to prevent overlapping with CAR.
Let's handle the potential overlap in C macros instead and get rid
of that option. Currently, it was only used by most FSP1.0 boards,
and only because the `fsp1_0/Kconfig` set it to CBFS_SIZE (WTF?).
Change-Id: I4d0096f14a9d343c2e646e48175fe2127198a822
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/26566
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
41 lines
794 B
Text
41 lines
794 B
Text
if BOARD_INTEL_CAMELBACKMOUNTAIN_FSP
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config BOARD_SPECIFIC_OPTIONS
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def_bool y
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select SOC_INTEL_FSP_BROADWELL_DE
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select BOARD_ROMSIZE_KB_2048
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select HAVE_ACPI_TABLES
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select HAVE_OPTION_TABLE
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select TSC_MONOTONIC_TIMER
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select INTEGRATED_UART if FSP_PACKAGE_DEFAULT
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select HAVE_FSP_BIN if FSP_PACKAGE_DEFAULT
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select SERIRQ_CONTINUOUS_MODE
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config MAINBOARD_DIR
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string
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default "intel/camelbackmountain_fsp"
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config MAINBOARD_PART_NUMBER
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string
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default "Camelback Mountain CRB"
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config IRQ_SLOT_COUNT
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int
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default 18
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config CBFS_SIZE
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hex
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default 0x00200000
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config VIRTUAL_ROM_SIZE
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hex
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default 0x1000000
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config DRIVERS_UART_8250IO
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def_bool n
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config FSP_PACKAGE_DEFAULT
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bool "Configure defaults for the Intel FSP package"
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default n
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endif # BOARD_INTEL_CAMELBACKMOUNTAIN_FSP
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